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Intel Technology

Intel 45nm Fab Process Launched And Penryn Preview 113

NinjaKicks writes "Intel has decided to make public details of their new 45nm manufacturing process and also has broken news that next-gen Penryn core processors are running various versions of Windows and Vista successfully. Penryn will offer a host of core tweaks over Conroe, larger cache sizes, and SSE4 support. Also, although clock speeds will be increased, processors based on Penryn should fall within the same thermal power range as Conroe. Word is Penryn will also be compatible with some of the existing motherboards on the market while others will need either a BIOS update or perhaps other board-level changes."
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Intel 45nm Fab Process Launched And Penryn Preview

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  • by kestasjk ( 933987 ) * on Saturday January 27, 2007 @12:14PM (#17783866) Homepage
    • ~2x improvement in transistor density, for either smaller chip size or increased transistor count
    • ~30% reduction in transistor switching power
    • >20%improvement in transistor switching speed or >5x reduction in source-drain leakage power
    • >10x reduction in gate oxide leakage power

    As a layman this sounds like a pretty massive improvement. Is this a major breakthrough or is this progress as usual?
    • I'd classify it as a minor breaktrough, such things happen every few years but are a huge gain at once.

      But feature size isn't everything.

      • by Bender_ ( 179208 ) on Saturday January 27, 2007 @02:11PM (#17784628) Journal
        This is the first time since 1969 that a major modification to the MOSFET gate stack occured. In fact it is fairly major. I should remind you that this is a structure that is replicated around 1e19 times each year and is responsible for the biggest part of the 270 Billion US$ semiconductor market.

        At least ten years of work in academia and industry and billions of dollars were poured into this. Intel is the first company to make the move and introduce high-k.

        (Yes, there were a few minor modifications to the SiO2/Poly stack in between: Plasma nitridation and numerous improvements on SiO2 growth)
    • FTFA (Score:5, Interesting)

      by Aaron England ( 681534 ) on Saturday January 27, 2007 @12:27PM (#17783980)
      This is a show of strength if you will, and an impressive one at that. How impressive? We'll wrap-up here with a few quotes from Gordon Moore (Intel), Professor Dimitri Antoniadis (MIT), and Yoshio Nishi (Stanford) telling you what they think of Intel's achievements.

      "The implementation of high-k and metal gate materials marks the biggest change in transistor technology since the introduction of polysilicongate MOS transistors in the late 1960s" - Gordon Moore

      "The Intel 45-nm CMOS technology marks a historic milestone for the semiconductor industry. Similar to the transition from single metal (Al) gate to polysilicon gate that has allowed optimal nFET and pFET design, the introduction of dual metal with high-k-insulator gate-stack opens the path for optimal design of both types of FETs, at insulator thicknesses necessary for continuing device scaling that are impossible to reach with the industry-standard silicon-dioxide-based insulators. Many options of high-k gate-stacks have been the target of intense industry and academic research for many years now, but Intel's demonstration of a manufacturable dual-metal/high-k solution is a remarkable first." - Prof. Dimitri Antoniadis

      "It is a huge break through to replace more than three decade's long successful polysilicon gate technology with a new high-k+metal gate technology. Though the combination of high-k dielectrics and metal gate electrode for advanced CMOS has been extensively studied by many researchers around the world as the ideal MOS gate structure, the technical hurdle to bring the technology to manufacturing floor has been believed still too high for the 45nm node. As a researcher in this field, I am pleasantly surprised by the announcement and would like to congratulate Intel researchers for their success that Intel has demonstrated 45nm microprocessors with their high-k and metal gate technology. Even though specific metal and high-k material have not been disclosed at this moment, this is a revolutionary step toward the world of sub-50nm CMOS integrated circuits, as this new technology will drastically improve transistor performance in all fronts of electrical specifications, resulting in significant improvement of IC performance." - Yoshio Nishi

      • Re:FTFA (Score:4, Interesting)

        by stevesliva ( 648202 ) on Saturday January 27, 2007 @12:50PM (#17784130) Journal

        "The implementation of high-k and metal gate materials marks the biggest change in transistor technology since the introduction of polysilicon MOS transistors in the late 1960s" - Gordon Moore
        I don't know, I may have to disagree with his eminence on this one... but, parsing his statement a little more finely, he does specifically mention transistor technology. I still view this as an evolutionary refinement of CMOS, and not as big as the transition from bipolar to CMOS for mainstream processors. It is a bigger deal than strained silicon. And by specifying "transistor" he of course sidesteps the comparision to the similar chemical reengineering of the back-end metal stack that came with the introduction of copper and low-k dielectrics. I speculate that like those changes, though, the implementation of the process changes will be relatively transparent to the circuit designers. Yes, the models change, hopefully the subthreshold leakage goes way down, but you've still got the G,D,S,B paradigm... right?
        • by WaZiX ( 766733 )
          Yes, the models change, hopefully the subthreshold leakage goes way down, but you've still got the G,D,S,B paradigm... right?
          riiiiight!
      • by warrior ( 15708 )
        I think this is just a lot of Intel FUD. There are other semiconductor companies that will have similar improvements in their designs as well. One that I think is most interesting that Intel will not have is called HOT - Hybrid Orientation Technology. This is only possible for the vendors that use an SOI process. Basically, HOT allows for the Si crystal to be oriented in two different ways, one way for PFETs and one for NFETs. What this means is that we no longer have to choose which FET is fastest in
        • by Bender_ ( 179208 )

          I can tell you this is not FUD. If you follow the literature about this subject closely you will notice that there is no report about a metal usable for a pMOS transistosr. Many companies are not significantly ahead of that. I expect some pretty interesting publications later this year. But it still takes several years to get a new material into production. Intel has already made big strides in putting high-k into production while other companies may still be in the screening process. I believe they have a
        • by Bender_ ( 179208 )

          also: HOT and SOI are quite expensive, it saves a lot of money (at least now) to engineer around those solutions.
          • by warrior ( 15708 )
            The cost of a 12-inch bulk wafer is about $400, an SOI wafer $600. The back-end processing for each is $2000+ ( slightly more for bulk for additional junction engineering to get the additional performance ). The cost difference is about a wash. I guess SOI does take a cost hit when it comes to yield. I'm not trying to take anything away from Intel's accomplishment, but they're not the only ones working on exciting new technologies. I think they're just shouting about this because they're the first ones
            • by Bender_ ( 179208 )

              AFAIR Intel presented some interesting technologies studies on SOI a couple of years ago.

              Your wafer cost figures are off, but I will rather not comment due to lack of public sources. Still, in most parts of the semiconductor business 10% cost difference is not a wash but determines whether you make profit or not. It may work for a short while if you have a very high margin product (like a technologically superior CPU), but then you are suddenly in a price war...

            • I doubt it's out of spite, if it would make them more money they'd do it. They are a publicly traded company and as such the focus is profit.
              They may have adopted the N.I.H. attitude in for pr reasons e.g.: "We're Intell, we lead not follow!".
              Or perhaps they felt the cost at the time was prohibitive relative to the advantages and by the time the tech was cheap enough to implement they already had something more promising (p
    • by Ant P. ( 974313 )
      If they can build a high-end chip that produces less waste heat than the 386, _that_ would be a breakthrough.
    • As a layman this sounds like a pretty massive improvement. Is this a major breakthrough or is this progress as usual?
      Depends on your definition of "breakthrough". Breakthroughs aren't what they were 30 years ago. This one gives us maybe 10 additional years on the Moore's law curve. Sounds like a middling leap at best.
      • by RicktheBrick ( 588466 ) on Saturday January 27, 2007 @01:46PM (#17784492)
        If one has a penny and doubles it one has $.02. If one has a million dollars and doubles it one has 2 million dollars. Most people would consider the latter to be a more important improvement. It is the same for microprocessors, doubling now is that much greater than it was 30 years ago.
        • by acidrain ( 35064 )
          If all you have is $20 in your pocket and no idea how you are going to earn money, getting another $20 means a lot more than handing a second billion to a billionaire. Processing speed is becoming meaningless on the desktop for most users. This is mostly relevant to servers now that we are moving to thin clients in the form of web-browsers, and expecting more an more processing from webservers.
    • by brejc8 ( 223089 ) * on Saturday January 27, 2007 @12:36PM (#17784046) Homepage Journal
      Yes and No.
      There are two improvements here which are happening at the same time. Process shrink (which happens all the time) and the use of High-K dielectric (which is something reather new in the mass manufacture feild anyway)

      These 2 are just due to process shrink and nothing special:
        * ~2x improvement in transistor density, for either smaller chip size or increased transistor count
        * ~30% reduction in transistor switching power

      This one is interesting and the OR should be regaded as an XOR.
        * >20%improvement in transistor switching speed or >5x reduction in source-drain leakage power
      Basicly the individual transistors become tunable to decide if they should be fast or low power. Critical path ones will be fast and others will be low power.

      And this one is a breakthrough:
        * >10x reduction in gate oxide leakage power
      With static power now accounting for up to 50% of all power this is excelent.
      • Re: (Score:3, Interesting)

        by Bender_ ( 179208 )

        That is not entirely correct. Intel had basically maxed out SiON previously, I doubt they could have gained that much in performance without high-k.
      • by dabraun ( 626287 )

        And this one is a breakthrough:
            * >10x reduction in gate oxide leakage power
        With static power now accounting for up to 50% of all power this is excelent.
        I hate to be pedantic, but you can't have a "10x reduction" in anything, a 1x reduction is zero. What does this really mean? 90% reduction (1/10th remaining)?
    • Moore's Law says that massive improvements ARE progress as usual, but people have been so pessimistic about the future of Moore's Law that giving it a new lease on life counts as a major breakthrough.
      • by cnettel ( 836611 )
        Actually, for a long time, the refinements were highly in the field of litography, decreasing the wavelength and so on. Performance made breakthroughs, the actually technology "just" progressed. The last few years, that's been coupled with a lot more materials research. True, that's been going on for decades as well, but lots of the supposed advancements during the 80s never made it. Now, it seems like we actually need to reevaluate every piece of the process to do those things.
    • Re: (Score:2, Insightful)

      by wtarreau ( 324106 )

      * ~2x improvement in transistor density, for either smaller chip size or increased transistor count
      * ~30% reduction in transistor switching power
      * >20%improvement in transistor switching speed or >5x reduction in source-drain leakage power
      * >10x reduction in gate oxide leakage power
      As a layman this sounds like a pretty massive improvement. Is this a major breakthrough or is this progress as usual?

      While not a major breakthrough per se, it demonstrates intel's commitment to work on architectural evo

  • Still on the FSB (Score:3, Interesting)

    by Joe The Dragon ( 967727 ) on Saturday January 27, 2007 @12:23PM (#17783944)
    If you are going to the make the chips smaller how hard is it to come out with a true quad-core?
    Havening 2 duel-cores linked by a fsb bus will get in the way even faster as the speed of the cpu gets higher.
    And a 4 cpu quad-core sever will likely choke up at the chipset to ram link as well as the chipset to chipset link.

    Also if your duel quad-core workstation only have has the pci-e lanes for 1 x16 slot and the 8 other ones are used for the chipset to chipset link amd based ones will blow it away even more so with KL8 cpus. Right now an 2 cpu amd board has 4 pci-e x16 slots running at x16 x8 x16 x8 with 2 x4 lanes left over + each cpu can have a HTX slot or other HT based chip hook up to it.
    • Re: (Score:3, Insightful)

      Unfortunately (for your point) this has been proven wrong. The FSB works fine up to 2P machines. Intel will soon be quad FSB machines which should work very well for machines up to and including 4P/16Core. The proof is in the pudding, benchmarks show that the FSB limitation is only meaningful in a very few instances, and in most cases the superior uArch of Core2 more than makes up for it.

      As for K8L, looks interesting - we'll have to see. If you think it's going to have a broad 40% improvement over Cor

      • quad FSB machines may still choke up at the chipset with all of the cpus needing the use the same link to get to ram.

        Even if the K8L is %1-%5 faster it still kills Intel in sever / workstation chip sets in terms of number of pci-e lanes and Intel has no to way to better a high-end duel cpu quad-core amd KL8 system.
        as there 2 cpu system uses FB-DIMMs and only has 20-22 pci-e lanes with no sli.
    • by antifoidulus ( 807088 ) on Saturday January 27, 2007 @01:46PM (#17784498) Homepage Journal
      2 duel-cores

      Spelling Nazi time: It's dual! Dual! It's only "duel" if your processors are firing pistols at each other from 10 paces at dawn!
    • If you are going to the make the chips smaller how hard is it to come out with a true quad-core?

      Not very. It just takes time to go through all the design -> verification -> layout -> production steps that all new processors require. Yes, the two dual-core processors in a single package is a minor cheat, but it's not meant to be the only quad-core Intel produces. It simply let the consumer have a quad-core chip now which will help push software manufacturers produce programs that utilize the p

  • news that next-gen Penryn core processors are running various versions of Windows and Vista successfully

    I know Microsoft told us that Vista was new and all, but I didn't know it was this new!
    • by Anonymous Coward
      I don't know why everyone is going gaga over this processor technology, when it's clear that the biggest advance is that they've made Windows run successfully.

      Must have taken an army of late night patch coding wizards.
      • by rbanffy ( 584143 )
        Wish I had modpoints. +1 funny for you.

        I mainly find it funny because I usually don't run Windows. If I did, I would feel something a little bitter added to the funny mix, kind of a Dilbert strip.
    • news that next-gen Penryn core processors are running various versions of Windows and Vista successfully

      Actually, the article does not say "various versions of Windows and Vista successfully". It says: "Intel said it had already manufactured prototype microprocessor chips in the new 45-nanometer process that run on three major operating systems: Windows, Mac OS X and Linux."

      Yes, you read that right.... they actually said "Linux". :) Of course, it is not a surprise it can run Linux (that is a major "

  • In the article, they keep on talking about high capacitance as if it's a good thing, but I was under the impression that you want to minimize the capacitance to let the transistor switch faster. Am I wrong? Is the article wrong? Is this a different capacitance that they're talking about?
    • by NMerriam ( 15122 )

      In the article, they keep on talking about high capacitance as if it's a good thing, but I was under the impression that you want to minimize the capacitance to let the transistor switch faster. Am I wrong? Is the article wrong? Is this a different capacitance that they're talking about?

      I interpreted it to mean that the high capacitance referred to the low level of leakage -- ie, more energy stays inside the path as productive power rather than radiating as heat or creating static interference with nearb

    • Re: (Score:3, Interesting)

      by WhiplashII ( 542766 )
      In a CMOS-like technology, you want overall capacitance as small as possible - because you have to charge and discharge that capacitor once per cycle. A first order approximation of power used is 0.5*Capacitance*(voltage squared). A first order approximation of the speed of the device is voltage*current/capacitance (where current is an exponential function of voltage). This means that from a circuit perspective, capacitance is the root of all evil (it both slows you down and uses up power).

      When you look
      • Actually, drop the 0.5 if you are talking about a cycle, you have to assume the energy enters and leaves in a complete cycle.
  • So does this mean that the "future improvements will be on number of cores, not on individual core speeds" state of things in CPUs isn't true anymore? Anyone have any quotes on how much raw performance these 45nm CPUs will attain?
    • It's still mostly true. Going from a 3.0 GHz Conroe to ~3.7 GHz Penryn is only a 30-40% performance increase, but we want a 100% increase. So we can expect that the number of cores and frequency will both increase.
  • TFA didn't mention anything about the Low K part, anybody has any information? Porous MSSQ? Porous SiLK? Porous Black Diamond (if it exists)?
    • by Bender_ ( 179208 )

      This article offers some hints:

      http://www.fabtech.org/content/view/2079 [fabtech.org]
      • It looks like a new generation of Aurora. I guess they must introduced kind of pores in the Aurora. Or something else, I can't imagine the doped silicon oxide alone can reach such low K. But I also can't imagine how to make pores in Aurora too. Or maybe they simply figured out a way to keep the dielectric value low at small scale. Comparing to the porous MSSQ used in AMD/IBM 45nm product, I bet Aurora is better in reliability.
      • This article http://www.eetimes.eu/production/196701258 [eetimes.eu] implies that the Black Diamond can reach K value of 2.4, but the mechanical properties is even worse than porous SSQ filem. Thus Aurora should be able to reach 2.4 too.
  • Sounds to me like they went to reach as far ahead of AMD-ATI as possible, to keep their lead. God I love competition.
  • The link in the main article is paraphrased from http://www.intel.com/technology/silicon/45nm_techn ology.htm [intel.com]
  • You are missing the point here. IBM and intel, on the same day (Friday), independently announced [washingtonpost.com] a breakthrough in transistor design. Now isn't this strange? The biggest advance in transistors in the last 40 years or so - and two different companies announce it on the same day?!?!? Fishy.
    • I posted links to similar articles as a reply to the FP (an anonymous troll), but I hadn't read your article.

      Initially I interpreted it as Intel and IBM cooperating on researching the new hafnium-based technology (this is the interpretation that Wikipedia's Hafnium article [wikipedia.org] currently uses), but on further reading I realised that they were doing this quite independently, and AMD, Sony, and Toshiba were partnered with IBM on this research.

      IBM may be basing the 4 to 6 GHz clock speeds of its new POWER chips on
      • Re: (Score:2, Insightful)

        by edxwelch ( 600979 )
        AMD will have a process with the low k thingy one year after Intel. I suspect IBM delibrately made their announcement on the same day to take the wind out of Intels sails, even though they're a year behind.
  • so eventually can I drop a 45nm shrink into my c2d macbook?

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