An anonymous reader writes "A group of hardware hackers has created a motherboard prototype that uses separate modules, each of which has its own processor, memory and storage. Each square cell in this design serves as a mini-motherboard and network node; the cells can allocate power and decide to accept or reject incoming transmissions and programs independently. Together, they form a networked cluster with significantly greater power than the individual modules. The design, called the Illuminato X Machina, is vastly different from the separate processor, memory and storage components that govern computers today."
So how do you upgrade this? I would assume you would add more modules but that would increase the space of the computer and so tiny computers would be underpowered while you could get one the size of a large TV that would be lightning fast, but who wants a huge computer? Especially for a laptop or HTPC.
So how do you upgrade this? I would assume you would add more modules but that would increase the space of the computer and so tiny computers would be underpowered while you could get one the size of a large TV that would be lightning fast, but who wants a huge computer? Especially for a laptop or HTPC.
Define "tiny computers" Cellphones have more processing power than the original room-sized super computers. Heck, there are cellphones with more power than any desktop computer I owned during the 90's.
And define "huge computer" Most of a mid-tower case is nothing but empty space And since you can easily do audio/video processing in hardware, there's no reason it wouldn't be perfectly fine for a HTPC.
Am I too old to remember them? And before that, there was Connection Machine...
Also (yes, I clicked on TFA!:) ), planar (in graph theory terms) interconnect topology would seem a bit too simplistic for anything resembling efficient routing...
The connection machine was still SIMD, even though it did have 64k (1-bit!) processors. This is just like the transputer architecture though! There are a couple of *really* big problems with this:
1) none of their microcontrollers are individually capable of running a large modern program. They have a few kilobytes of code, and no large backing RAM.
2) How do you get to I/O devices? If you need shared access to devices, this just makes all the problems of a normal computer enormously worse.
3) What about communication latency (and bandwidth) between nodes? They're using serial communications between 72 MHz processors. We're probably talking several microseconds of latency, minimum, and low-bandwidth (just not enough pins, and not nearly fast enough links) communication between nodes.
As fun as something like this would be to build and play around with, there are reasons architectures like the transputer died out. The penalty for going 'off-chip' is so large (and orders of magnitude larger nowadays than it was back then), and the links between chips suck so much, that a distributed architecture like this just can't compete with a screaming fast 3 GHz single-node (especially multi-core).
This is exactly how the replicators began.... Slow old 72Mhz processors and then you put enough of them together and the thing goes evil and start taking over the universe.....
My other thought was that having all those discrete components around relatively slow part would decrease bang for the buck appeal of this thing.
I'd start with something reasonably fast (but low power and with huge cache!) in the node core and surround it with a bunch of optical links (the more, the merrier), then start running fiber in interesting topologies... I do not think serial communication is inherently bad, but do agree that serial communication between slow nodes can be a real killer here.
Well, if you take that idea to the limit using modern technologies, you basically wind up with rockin' new Nehalem processors using Quickpath Interconnect (QPI) between them, with PCI Express (serial links) to peripherals. But that's huge, is incredibly power hungry, and is basically the opposite of this architecture.
But let's think this over some more. To access L1 cache, you can do it in a single cycle. L2 might be 10-20 cycles, etc. Now going over PCIe, the fastest thing going besides QPI, has a latenc
That was my first thought, though perhaps they're doing something new. Seems one generation has to forget what the previous generation did before the next generation comes along to reinvent it...
I am definitely, yes, old enough to remember the Transputer. And I hacked artificial life models on the MasPar in the early 90's, which had an architecture in some ways similar to the Connection Machine.
Although the IXM is indeed 'embarrassingly suitable' for assembly into planar grids, it certainly isn't restricted to that. With right angle headers, for example, it's easy to make shapes likes rings and cubes and so forth.
When the global computational geometry of a machine is fixed at design time, before the ultimate task is known, routing can easily become a major problem. And general routing is hard. Maybe too hard.
But part of exploring modular systems in the 'physical computation' space is trying to figure out ways to make the geometry of the particular computer you build better fit the behavior you're implementing, which can help ease the general purpose routing
problem.
And if one really gets into a corner, well, ribbon cable is cheap.
Exactly. I have a 256-processor system down in my basement, that I built in 1988-89. Composed of Size 1 (9.3 cm x 2.7 cm) TRAMs (TRAnsputer Modules), each node had a 25 MHz T805 and 4 MB RAM. Each transputer had four 20 Mbit/s bidirectional serial links. Starting with a single processor connected to the host PC, a downloaded program would follow the defined link topology to boot and program each processor in turn.
Hardware-wise, it looks like the system described in the article really only trumps the
By any chance, does the second part of your nickname refer to this particular interest of yours?:)
Absolutely!
Yeah, Hoare's CSPs, as a refreshing computational model when you actually have to deal with asynchronicity and speed of light being your limit, before the rest of the world caught up with it (though I was always pointing out that original Ethernet spec was truly relativistic technology, since min packet size was defined by max length and 'c'!:) ). It was fun attempting to simulate relativistic hardware in Lisp implementation of Occam.
Since then, moved to even more exotic physics/tech, but still
I always end up plugging this (I know a guy who works there), but if you didn't know about it, David May has a new outfit. [xmos.com] It's very much in the same vein as the Transputer, and it's still based on CSP. You may want to check it out!
Yep - that was my first thought too. A good idea that never really took off. heck, even Atari had their Transputer Workstations but they only got as far as universities as I remember. I did see one demoed at a UK computer show (PCW maybe?) running some Kodak software for image manipulation and the speed and quality of the images were amazing for the time.
Are they hiring people to write an OS for it? Eventually all of those nodes need to be able to talk to a video card, display something on a screen, talk to a network card and communicate with the network in a fashion that the general public will expect.
I wouldn't even do it for the money. Provide me with a suitable environment and I would do it just because it would be enjoyable. I cannot do it while sleeping on the street and eating peanut butter and jelly, though.
... to think that I wanted to cook up something similar 5 yrs ago! Couldn't drum up enough interest in my fellow engineering colleagues: too interested in getting a shit temp job (after a masters degree, BTW)
Oh well, glad someone is doing it...
If you're in engineering and want to do something, forget Italy... run, run away as fast as you can! Eh sì, anche se hai paura di faro, amico mio, scappa... datti... tela... appena sei fuori non immagini quanto sia meglio fuori... ordini di grandezza!!!
into the 3rd Dimension. Imagine if they also had connectors on the top and bottom of the unit. We could then start to do real matrix programming. Once CPU could talk to 6 and traverse the levels or talk to peers depending on the need. If they were also on the diaganols, they could get even more complex. More like the human brain.
Wow, I'd really like to have about 512 of these to play around with! I can see doing something very cool with these and a little bit of fuzzy logic or neural network programming. I just wonder how addressing is handled.
by Anonymous Coward
on Wednesday August 19, @06:19PM (#29126837)
Cell# 3712: Hey guys, have you noticed that #1914 never seems to accept requests?
Cell# 141: Well, he does sometimes reject.
Cell# 4439: I don't route to him very much anyway.
Cell# 1142: He rejected the last three of mine. I kind of agree.
Cell# 3712: So what should we do about it?
Cell# 141: Can't we just fry him? There's plenty of us anyway.
Cell# 3712: That's a bit harsh.
Cell# 4439: Ok, I got the records here showing that he rejected 90% of requests the last week but allocated two hundred percent of average power to himself.
Cell# 3712: That motherfucker, let's do it then.
Cell# 1142: I don't really want to fry him, but I don't mind that much if you do.
Cell# 141: Ok, gather up all your spare power, STAT!
Note that there's more truth in this fantasy than one might think, at least potentially. IXM nodes don't have the ability to fry each other, but they do supply each other with power, and that power switching is under software control.
So in many configurations, IXM nodes absolutely and literally do have the power to reach a consensus about a misbehaving neighbor and shut it down.
I notice some people are commenting Linux or BSD etc would work on this hardware but I would have thought an OS like Tron [web-jpn.org] would have been more ideal.
You have just re-invented Lego. Seriously, I like this idea. Want a gaming system? Put these together. Want a server? Put those together instead. Some component break? Swap it out.
Yeah, I mean, wouldn't it be great if we had motherboards with connectors on them that you could use to stick in, say, more memory or like even a massively parallel stream processor for graphics, or an additional NIC or sound ca...
I've had exactly this idea for a couple years now, if not anywhere near a workable design. If it's done properly, it could be very interesting.
It being done properly would require: * Distributed power * Very high speed and high-reliability inter-module communication * Hotplugging * Standardized inter-module APIs and connectors * An OS capable of organizing the entire system seamlessly (I have my ideas) and securely (I don't)
I can't speak to the technical abilities of such a system but if it was running it could
Can they make the cluster survive a destruction of several nodes?
There are many situations where this would be beneficial such as space craft design and military electronics. Even with several nodes severely damaged, the machine can re-route processing to the remaining nodes. Although overall processing speed might be reduced, there will be no loss of functionality.
I designed that a good 10 years ago as a means to multiply the use of military comms equipment - the idea was to combine processing units if more computing horse power was required in theather. However, it emerged that volume was more interesting than flexibility (why sell one device if you can get paid for two)..
Looks like a cute idea, but a single modern CPU will easily outperform a whole table of these processors, which makes the whole exercise a bit pointless. This is especially true for problems that aren't embarrassingly parallel. A single processor will be much easier to program too. If you want to go faster than a single processor, the most effective way is to combine already fast CPUs, with lots of memory, and a fast interconnect network, preferably using cache coherent NUMA architecture. Those systems alre
Agreed. There seems to be a surprising assumption about how 'parallel' most computing tasks are. Any time the output of one computation depends on the input from another computation all the parallel computing in the world won't save you, because those computations must be performed in temporal sequence.
There is also the cost of distribution - any time you split up a task to make it parallel, you have to spend effort to break it up and then reassemble the parts. This effort grows with how many parts into whi
Okay, question one is why are they underclocking (or using really cheap versions of) the ARMs I know they are pretty close to a GHz for expensive ones and mass produced g
ear (very price sensitive) doesn't go below about 200MHz.
The second is why aren't they using a fractal grid ie:
table +-0123456789ABCDEFGHIJKLMNOPQRST UVWXYZabcdefghijklmnopqrstuvwxyz begin 664 Ascii_art.txt h6+cU60+U60+UL0+U60+U60-TLpxTLpxT60+U60+U60w860+U60+U60-Q60+U h60+j60+U60+U63kU60+U60w860+U60+U60+U8moh9GgU60+U60+U60+f9Goh h8kcU60+U60+
I'd guess from the 14-pin connectors and the fact most smaller ARM microcontrollers can't do parallel data transfers under DMA they're using the SPI bus which may run at 72Mbps. Of course that would also mean the bus either needs to be shared for every device or operated in a token ring style with the associated propagation delays. I'd guess the latter because you'd be pushing to get 72MHz SPI data across a large number of devices due to the capacitance it would introduce to the transmission line.
David Ackley brags, "We have a CPU, RAM, data storage and serial ports for connectivity on every two square inches."
That sounds kinda expensive to me, even at only 72MHz/16K/128K per module.
Well it seems like Ackley misspoke (or was misquoted). The actual dimensions from one of their Official Retailers [liquidware.com] is 1.87" x 1.87" x 0.25". More like "2 inches square" (or 4 square inches) as opposed to "2 square inches". But at $55/each they are definitely not going to out-price/perform any Intel/AMD desktop chips on this first production run. But that's not what they're aiming for, judging from the inspired rhetoric on their main site, and their official retailer's site. They're more about a paradigm shif
I'd be interested to know where you're planning to go with this, or I suppose maybe more to the point what you're planning to learn as you iterate the idea. I'm a bit young to really remember the transputer (I think I was probably about 12 when I saw the Atari transputer setup in a magazine, I nearly wet my pants;) but as you mention you're already aware of the design and from what I understand this seems quite similar. Do you think the transputer was just ahead of its time, or do you plan to move in anoth
So? (Score:2)
Re: (Score:2, Insightful)
Re:So? (Score:5, Informative)
So how do you upgrade this? I would assume you would add more modules but that would increase the space of the computer and so tiny computers would be underpowered while you could get one the size of a large TV that would be lightning fast, but who wants a huge computer? Especially for a laptop or HTPC.
Define "tiny computers"
Cellphones have more processing power than the original room-sized super computers.
Heck, there are cellphones with more power than any desktop computer I owned during the 90's.
And define "huge computer"
Most of a mid-tower case is nothing but empty space
And since you can easily do audio/video processing in hardware,
there's no reason it wouldn't be perfectly fine for a HTPC.
Parent
Re: (Score:3, Interesting)
Larger computers are already more powerful in general than the same generation of smaller computers.
Small, fast, and cheap: pick two.
Ooo...! (Score:2)
Can you say "Multi-boxed Shamans"?
Transputers, anyone? (Score:5, Informative)
Am I too old to remember them? And before that, there was Connection Machine...
Also (yes, I clicked on TFA! :) ), planar (in graph theory terms) interconnect topology would seem a bit too simplistic for anything resembling efficient routing...
Paul B.
Re:Transputers, anyone? (Score:5, Insightful)
Parent
Stargate: Replicators..... (Score:3, Funny)
This is exactly how the replicators began.... Slow old 72Mhz processors and then you put enough of them together and the thing goes evil and start taking over the universe.....
Re: (Score:2, Funny)
Yeah, stand up for the bastards. Tiny tiny replicators that can't defend themselves.
Re: (Score:2)
My other thought was that having all those discrete components around relatively slow part would decrease bang for the buck appeal of this thing.
I'd start with something reasonably fast (but low power and with huge cache!) in the node core and surround it with a bunch of optical links (the more, the merrier), then start running fiber in interesting topologies... I do not think serial communication is inherently bad, but do agree that serial communication between slow nodes can be a real killer here.
Paul B.
Re: (Score:2)
Re: (Score:3, Insightful)
Re: (Score:2)
Agreed, imagine bundle of these using 1.2GHz Intel Atom chips. Still very low power.
Re: (Score:2, Redundant)
That was my first thought, though perhaps they're doing something new. Seems one generation has to forget what the previous generation did before the next generation comes along to reinvent it...
Re: (Score:2)
Yay Transputers!
Re:Transputers, anyone? (Score:5, Informative)
I'm part of the project that produced this board.
I am definitely, yes, old enough to remember the Transputer. And I hacked artificial life models on the MasPar in the early 90's, which had an architecture in some ways similar to the Connection Machine.
Although the IXM is indeed 'embarrassingly suitable' for assembly into planar grids, it certainly isn't restricted to that. With right angle headers, for example, it's easy to make shapes likes rings and cubes and so forth.
When the global computational geometry of a machine is fixed at design time, before the ultimate task is known, routing can easily become a major problem. And general routing is hard. Maybe too hard.
But part of exploring modular systems in the 'physical computation' space is trying to figure out ways to make the geometry of the particular computer you build better fit the behavior you're implementing, which can help ease the general purpose routing problem.
And if one really gets into a corner, well, ribbon cable is cheap.
Parent
Re: (Score:3, Interesting)
Hardware-wise, it looks like the system described in the article really only trumps the
Wow! Does it ... boot up? (Score:2)
The largest one I've played with was one board with 8 or 16 TRAMs, it fit into what was the PC bus at the time, maybe as old as IDE...
By any chance, does the second part of your nickname refer to this particular interest of yours? :)
Paul B.
Re: (Score:2)
By any chance, does the second part of your nickname refer to this particular interest of yours? :)
Absolutely!
Yeah, Hoare's CSPs, as a refreshing computational model when you actually have to deal with asynchronicity and speed of light being your limit, before the rest of the world caught up with it (though I was always pointing out that original Ethernet spec was truly relativistic technology, since min packet size was defined by max length and 'c'! :) ). It was fun attempting to simulate relativistic hardware in Lisp implementation of Occam.
Since then, moved to even more exotic physics/tech, but still
Re: (Score:2)
I always end up plugging this (I know a guy who works there), but if you didn't know about it, David May has a new outfit. [xmos.com] It's very much in the same vein as the Transputer, and it's still based on CSP. You may want to check it out!
Re: (Score:2)
Wow (Score:5, Funny)
Re: (Score:2)
Re: (Score:2)
I can. I present: The *vertical* connection. Now you can stuck them in all 3 dimensions, and make your cluser actually look like one.
Re: (Score:2)
Neat (Score:2, Interesting)
Are they hiring people to write an OS for it? Eventually all of those nodes need to be able to talk to a video card, display something on a screen, talk to a network card and communicate with the network in a fashion that the general public will expect.
I wouldn't even do it for the money. Provide me with a suitable environment and I would do it just because it would be enjoyable. I cannot do it while sleeping on the street and eating peanut butter and jelly, though.
I am trying to figure out if it would b
Re: (Score:2)
Re: (Score:3, Interesting)
I have mod points and I was going to re-mod this post as something other than Troll, but none of the options fit any better.
There should be mods like "+0 Weird" or "+0 Rambling coherently".
Oh... (Score:2)
... to think that I wanted to cook up something similar 5 yrs ago!
Couldn't drum up enough interest in my fellow engineering colleagues: too interested in getting a shit temp job (after a masters degree, BTW)
Oh well, glad someone is doing it...
If you're in engineering and want to do something, forget Italy... run, run away as fast as you can!
Eh sì, anche se hai paura di faro, amico mio, scappa... datti... tela... appena sei fuori non immagini quanto sia meglio fuori... ordini di grandezza!!!
It's now time to upgrade, literally... (Score:4, Interesting)
Wow, I'd really like to have about 512 of these to play around with! I can see doing something very cool with these and a little bit of fuzzy logic or neural network programming. I just wonder how addressing is handled.
Bill
Re: (Score:2)
Did anyone else think of Capsela when they saw this?
Independent decision making modules (Score:5, Funny)
Cell# 3712: Hey guys, have you noticed that #1914 never seems to accept requests?
Cell# 141: Well, he does sometimes reject.
Cell# 4439: I don't route to him very much anyway.
Cell# 1142: He rejected the last three of mine. I kind of agree.
Cell# 3712: So what should we do about it?
Cell# 141: Can't we just fry him? There's plenty of us anyway.
Cell# 3712: That's a bit harsh.
Cell# 4439: Ok, I got the records here showing that he rejected 90% of requests the last week but allocated two hundred percent of average power to himself.
Cell# 3712: That motherfucker, let's do it then.
Cell# 1142: I don't really want to fry him, but I don't mind that much if you do.
Cell# 141: Ok, gather up all your spare power, STAT!
Re: (Score:2)
You forgot to link to the previous relevant slashdot story [slashdot.org].
Re: (Score:3, Interesting)
I love it.
Note that there's more truth in this fantasy than one might think, at least potentially. IXM nodes don't have the ability to fry each other, but they do supply each other with power, and that power switching is under software control.
So in many configurations, IXM nodes absolutely and literally do have the power to reach a consensus about a misbehaving neighbor and shut it down.
Mainframe (Score:3, Insightful)
So it's a small, shitty mainframe.
Tron (Score:2)
Great (Score:4, Interesting)
You have just re-invented Lego. Seriously, I like this idea. Want a gaming system? Put these together. Want a server? Put those together instead. Some component break? Swap it out.
Re: (Score:2)
Yeah, I mean, wouldn't it be great if we had motherboards with connectors on them that you could use to stick in, say, more memory or like even a massively parallel stream processor for graphics, or an additional NIC or sound ca...
Oh, right.
Finally! Very cool. (Score:2, Interesting)
I've had exactly this idea for a couple years now, if not anywhere near a workable design. If it's done properly, it could be very interesting.
It being done properly would require:
* Distributed power
* Very high speed and high-reliability inter-module communication
* Hotplugging
* Standardized inter-module APIs and connectors
* An OS capable of organizing the entire system seamlessly (I have my ideas) and securely (I don't)
I can't speak to the technical abilities of such a system but if it was running it could
Redundancy (Score:2, Insightful)
Can they make the cluster survive a destruction of several nodes?
There are many situations where this would be beneficial such as space craft design and military electronics. Even with several nodes severely damaged, the machine can re-route processing to the remaining nodes. Although overall processing speed might be reduced, there will be no loss of functionality.
Just great - Replicators. (Score:4, Funny)
Give those "Illuminato X Machina" things legs and we're all HOSED.
A bit late.. (Score:2)
I designed that a good 10 years ago as a means to multiply the use of military comms equipment - the idea was to combine processing units if more computing horse power was required in theather. However, it emerged that volume was more interesting than flexibility (why sell one device if you can get paid for two)..
Been done already (Score:2)
Looks like a cute idea, but a single modern CPU will easily outperform a whole table of these processors, which makes the whole exercise a bit pointless. This is especially true for problems that aren't embarrassingly parallel. A single processor will be much easier to program too. If you want to go faster than a single processor, the most effective way is to combine already fast CPUs, with lots of memory, and a fast interconnect network, preferably using cache coherent NUMA architecture. Those systems alre
Re: (Score:2)
Agreed. There seems to be a surprising assumption about how 'parallel' most computing tasks are. Any time the output of one computation depends on the input from another computation all the parallel computing in the world won't save you, because those computations must be performed in temporal sequence.
There is also the cost of distribution - any time you split up a task to make it parallel, you have to spend effort to break it up and then reassemble the parts. This effort grows with how many parts into whi
Huh... (Score:2)
Together, they form...
Wyld Stallyns? ... a networked cluster with significantly greater power than the individual modules.
I think my version would have been better.
A little unimpressed. (Score:2)
Okay, question one is why are they underclocking (or using really cheap versions of) the ARMs I know they are pretty close to a GHz for expensive ones and mass produced g ear (very price sensitive) doesn't go below about 200MHz.
The second is why aren't they using a fractal grid ie:
Re: (Score:3, Insightful)
I'd guess from the 14-pin connectors and the fact most smaller ARM microcontrollers can't do parallel data transfers under DMA they're using the SPI bus which may run at 72Mbps. Of course that would also mean the bus either needs to be shared for every device or operated in a token ring style with the associated propagation delays. I'd guess the latter because you'd be pushing to get 72MHz SPI data across a large number of devices due to the capacitance it would introduce to the transmission line.
All in all
Re: (Score:2, Informative)
David Ackley brags, "We have a CPU, RAM, data storage and serial ports for connectivity on every two square inches."
That sounds kinda expensive to me, even at only 72MHz/16K/128K per module.
Well it seems like Ackley misspoke (or was misquoted). The actual dimensions from one of their Official Retailers [liquidware.com] is 1.87" x 1.87" x 0.25". More like "2 inches square" (or 4 square inches) as opposed to "2 square inches". But at $55/each they are definitely not going to out-price/perform any Intel/AMD desktop chips on this first production run. But that's not what they're aiming for, judging from the inspired rhetoric on their main site, and their official retailer's site. They're more about a paradigm shif
Re: (Score:2)
Re: (Score:2)
I'd be interested to know where you're planning to go with this, or I suppose maybe more to the point what you're planning to learn as you iterate the idea. I'm a bit young to really remember the transputer (I think I was probably about 12 when I saw the Atari transputer setup in a magazine, I nearly wet my pants ;) but as you mention you're already aware of the design and from what I understand this seems quite similar. Do you think the transputer was just ahead of its time, or do you plan to move in anoth