Qualcomm Announces First-ever Mass-market RISC-V Android SoC (arstechnica.com) 17
The Android ecosystem is hurtling toward a RISC-V future. From a report: The puzzle pieces for the up-and-coming CPU architecture started falling into place this past year when Google announced official RISC-V support in Android and plans to make it a "tier 1 platform" on equal footing with Arm. With the OS support underway, what we need now is hardware, and Qualcomm is stepping up to announce the first-ever mass-market RISC-V Android SoC. It doesn't have a name yet, but Qualcomm says it's developing a "RISC-V Snapdragon Wear" chip in collaboration with Google. The company says it plans to "commercialize the RISC-V based wearables solution globally including the US." For Google and Qualcomm, this chip represents everyone's first swing at a commercial RISC-V Android project, and as far as we can tell, it's the first announced mass-market RISC-V Android chip ever. Qualcomm says the groundwork it and Google lay out "will help pave the way for more products within the Android ecosystem to take advantage of custom CPUs that are low power and high performance."
RISC-V represents a big threat to the Arm CPU architecture that currently dominates all mobile devices. RISC-V architecture is open source, which can make it cheaper and more flexible than Arm. If companies want to design their own chips, they can do that without paying a licensing fee to Arm. Since the architecture is open source, it's possible to create a fully open source chip. If you're a chip-design firm, you can make your own proprietary chip designs and license them, making you a competitor to Arm's chip-design business. RISC-V is also a way to sidestep all of the various problems with Arm.
RISC-V represents a big threat to the Arm CPU architecture that currently dominates all mobile devices. RISC-V architecture is open source, which can make it cheaper and more flexible than Arm. If companies want to design their own chips, they can do that without paying a licensing fee to Arm. Since the architecture is open source, it's possible to create a fully open source chip. If you're a chip-design firm, you can make your own proprietary chip designs and license them, making you a competitor to Arm's chip-design business. RISC-V is also a way to sidestep all of the various problems with Arm.
Problems with Arm (Score:3)
RISC-V is also a way to sidestep all of the various problems with Arm
What are those problems?
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Well in this case, ARM and Qualcomm haven't produced a chip competitive with Apple Watch, it seems.
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Re:Problems with Arm (Score:5, Interesting)
It is Qualcomm that has a licensing problem with ARM.
Qualcomm acquired the chip design firm NUVIA in 2021, which had a license agreement for designing processor cores running ARM code.
ARM is suing Qualcomm, because according to them the agreement with NUVIA did not allow the license to be transferred to a parent company.
What many are suspecting Qualcomm of doing right now is to sidestep this issue by adapting the NUVIA-designing cores to instead run RISC-V.
Only in these past few weeks, Qualcomm has posted two proposals to RISC-V International that would make that more credible: First they want to skip the C (16-bit instruction) extension from Application profiles (which is something that 64-bit ARM does not have). Second, they want to add new address modes, that look like they were picked straight out of ARM's manuals.
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Second, they want to add new address modes, that look like they were picked straight out of ARM's manuals.
Uh don't even say shit like that .. even the hint of that is asking for drawn out litigation nightmare and a Damocles sword. I'll just assume you meant they are borrowing addressing modes from CISC architectures .. just like other RISC architectures like MIPS have done.
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RISC-V is also a way to sidestep all of the various problems with Arm
What are those problems?
Having designed ARMs into chips in the past, I'm some sort of not-up-to-date expert on this.
(1) The instruction set is objectively horrible. Kids these days think it's normal because it's all they've seen.
(2) The hard macros (pre-laid out ARM cores for a given silicon process) have horrible timing, taking most of the cycle for themselves, not registering outputs, making timing closure difficult.
(3) There is no standard architecture. X86 comes with instruction set specs and a whole bevy of specs for the rest
Re:vaporware (Score:5, Interesting)
RISC-V has already been deployed in the many thousands, as embedded processors.
There are several RISC-V cores as microcontrollers for various tasks in every Qualcomm ARM-based smartphone SoC since 2019 or so.
NVidia has also been using RISC-V as the control processor in its GPUs.
You can get single-board computers with one or more 64-bit RISC-V cores right now, to run Linux on. Something equivalent to a Raspberry Pi Zero, with comparable performance for comparable price.
What has been lagging behind have been various large features for application-class processors, such as the Vector extension, and Vector cryptography.
RISC-V international has quite recently been working on Application Profiles to standardise which extensions should be included in application platforms. Google has also published quite an extensive wish-lists of extensions that are probably going to be required for Android smartphone SoCs, which almost line up with the latest official profile from RISC-V International.
And that's where we are today.
On topic, what many are suspecting Qualcomm of doing right now is to modify existing designs that ran ARM to be running RISC-V instead ... mostly because they have had a falling-out with ARM.
StrongARMing the competition (Score:1)
This must be what all that commotion on RISC-V in congress was about. ARM getting all butthurt over competition.
China is why... (Score:3)
Because RISC-V is an ISA that is not patent encumbered (well, most of it), and there are not really any ways to block exports of it, it is taking off in China big time. Has anyone see the new RISC-V boards that are coming out? Boards like Milk-V are coming out with a lot of cool stuff. Even with older Linux kernels and software, they are doing quite well.
I expect to see China throwing a lot of manpower at getting RISC-V from the hard drive controller to the server CPU, especially that they are starting to be leaders with on-die matrix multiplication (i.e. AI).
Because of this, some politicians want to limit RISC-V... however that isn't going to help much. Remember how limiting encryption via ITAR in the 1990s helped things? It didn't. The cat is far out of the bag, and even with relatively antediluvian (10-20nm) process nodes, decent CPUs can be made.
Ironic. (Score:5, Interesting)
I think it's hilarious that Qualcomm sees no problem with making a chip based on a open ISA while simultaneously requiring an NDA just to read the datasheet of said chip. What a bunch of dopes.
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Oh, I understand that. Qualcomm is exhibiting the same type of parasitic behavior as Sony does with their FreeBSD on the Playstation machines. It's "take what you can and give nothing back."
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No, it's neither.
RISC-V is JUST AN ISA. To call yourself RISC-V, you just need to implement the base integer core - every other feature is optional.
So you can generate a RISC-V CPU using TTL chips (which has been done) or implement the most sophisticated OOE CPU running at multiple GHz and all of them can be called RISC-V.
The ISA is completely open. This is unlike ARM, where you can get the ISA documentation, but you can't implement your own ARM core
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I am not saying BSD-style is inherently "bad". The current MacOS uses a lot of BSD stuff and many people love it despite being closed source.
I am talking about the "openness" of RISC-V only provide a blueprint for people to save license cost on making their own chip for their own product, but not open enough for people to create chips that are hardware compatible with each other legally. Because the boot process is not standardized enough ("JUST AN ISA"), even software compatibility is only guaranteed to
SPARC T2 was GPled and no one cared. (Score:2)
I remember that Sun Microsystems's SPARC T2 was openspec and also its Verilog GPLed, and no one cared.