In a large CPU, there are many good reasons to incorporate microcode and I expect to see RISC-V with microcode become common.
You mean "large CPUs" like the Intel 8086?
I mean, it was quite a big component for it's time with it's 29000 transistors, but...
The 8086 was a long time ago used microcode for different reasons. It had a limited transistor budget and microcode was an efficient way to implement lots of instructions. Obviously there were other options, and it wasn't long before transistor budgets increased to allow for microcode-less CPU architectures.
Today in chips with many more transistors, microcode affords the flexibility to respond to security issues and bugs and to provide support for all sorts of features (VM stuff, trapping, failover etc) without encumbering the underlying instruction logic with that stuff. There is a middle ground in transistor budget where microcode-less CPUs are common. They don't have the features and they do have an instruction set designed with that in mind. What we have seen with higher end ARMs is they are big and complex and so have bugs and the vendors can't work around the bugs because they don't have microcode.
My knowledge is about 3 months old now (the time since I retired from a large CPU company) and I'm looking forward to being more and more out of date over time.