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AMD

Clawhammer to be 1/2 size of P4 163

selectspec writes "According to this news, AMD's 64bit ClawHammer will be roughly the same size as the Athlon, making it about 1/2 size of Intel's P4." Lookit them there transistors. They're so tiny.
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Clawhammer to be 1/2 size of P4

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  • by Anonymous Coward
    You AMD fanboys have a sad misunderstanding of the world. Intel has many times the fab capacity of AMD.

    Running at 100% production, AMD has about 21% marketshare. They can't steal any marketshare without building more fabs. Building fabs takes time and lots and lots of money. Therefore, unless Intel's sales nosedive, AMD is stuck at ~20% share for a while.
  • Another thing to remember is that the 72 watt number that Intel provides is the MAX power number. Intel also publishes the typical power number which is something like 52 watts. The max power number is actually extremely hard to hit, you really have to know what you're doing and write pathological code to get that number. The typical number is published because it is the typical power consumption. Games won't hit it. Kernel compiles won't hit it. The only thing I've ever heard of getting near that number is code designed explicitly to burn as much power as possible.

    When designing a system, you really design towards the typical number. That's what you expect to see most of the time. You have to design to be able to handle the max power number, but usually only for short periods of time.

    AMD parts have much smaller variances between typical and max, typically only a couple of watts. Basically, they run at full power constantly.

  • The 7200 was a second generation powermac with a PCI bus and a ppc 601 soldered on the motherboard.

  • But where are they going to store the 4 ounces of chedder cheese they use for L2 cache?
    IRNI
  • Any idea just what this will provide except for possibly lower power consumption and less heat?
  • Actually, the first-generation PPC (601) could run 68K apps faster than the fastest Quadra. And not even the fastest 601. My 7200/75 with a 1-MB cache posts better benchmarks in 68K mode than the Quadra 840AV.
  • Even better [kfc.com]. This seems to be pretty solid evidence of the Pentaveret [imdb.com], a secret society of the five wealthiest people in the world.

    F.O. Dobbs
  • Apple dealt with this problem by not putting FPU emulation in the 68K emulator. This killed off all the engineering apps, and another market segment was lost by the Mac.

    Then those developers should have gotten off their lazy asses and rewritten their apps to take advantage of the PowerPC (as all serious developers eventually did). Instead they set a nice example for Be, who threw a tantrum and quit developing for the Mac because Apple didn't hold their hands every step of the way.

    Side note: I really wansn't expecting my post to get modded up. Since Rob racheted up moderating, it seems you can fart on Slashdot and gain karma these days.
  • the Ball-Peen Hammer.

    -c
  • Actually, I didn't expect to get modded up - I was just trying to help prove the point from the parent post...

    Besides, I don't work for Microelectronics Division :)
    --
  • Usually that means 105mm per side:

    <- 105 mm ->
    ^
    |
    105mm
    |
    v

    --
  • by Anonymous Coward
    No, they're not violating the laws of physics by making it smaller. And sorry to shatter your entire arguement, but silicon isn't a conductor... hence no need for a "non-silicon" composite around it. Did you forget about the substrate?
  • by Anonymous Coward
    Please do not interfere in Slashdot's gay love affair with AMD.
  • by Anonymous Coward
    I enjoy your FUD, so let me play with it the way you play with your caca.

    First of all, calling the P4 "slow" is rather strange considering it's only a few percentage points off the fastest chip in the market.

    Second, it "overheats" in the exact same way the Athlon overheats - in inproper installations. Except the Athlon fries itself and the P4 doesn't. You guys should stop bringing this up - it's embarassing. Actually, anything x86 is a big fucking kludgy hotplate monster compared to PPC, so lets none us bring that up.

    Third, having a bunch of useless 64-bit circuts in a consumer-bound chip is the definition of a marketing kludge. Another embarassing point, so stop bringing it up. (I have respect for the folks that are going to run a native OS on this chip - everyone else is effectively just sizing dicks - as in 64 is twice as big as 32, no matter that the Windows ME packin still runs partially in real mode.)
  • Ask mac G4 overclockers (www.xlr8yourmac.com). IIRC, the G4 has been SOI for a while now...
  • by Anonymous Coward
    How'd they allow that info to be leaked to the public? Don't they know that by revealing the dimensions of their new processor before it's released, they're just feeding their competition with information that can be used to make an identical chip -- and perhaps even release it before AMD can? Things like the length and width of the chip are valuable trade secrets that should never be public knowledge.
  • Ah, and what about those apps that assume int is 32 bit (eg, quake:/), or worse, 16? (though the latter should be rare by now) Yes, 90% of the apps out there are just a re-compile away from 64bit, but this is a classic case of the 90/90 rule.

    Bill - aka taniwha
    --

  • Anybody know laymans' answers to these?
    1. AMD was using "monoisotopic" silicon to reduce heat. Natural silicon comes in three common nuclear isotopes, and monoisotopic silicon, where the other two isotopes are filtered out, has better heat transfer properties. Will Hammer be using the same technology?
    2. Will the monoisotopic substrate be available in 12"?
    3. Will copper interconnects be used? (I assume so)
    4. In college, I read that most people doing Silicon-on-Insulator (SOI) were depositing the circuitry on sapphire (SOS) as a substrate. In the article, it appears that IBM uses standard silicon, but builds up a layer of oxide to use as the insulator. Does anybody have any information on this process?
  • ...for the P4 version of the FFT code:

    1.4GHz P4, old code: 0.126 sec.
    1.4GHz P4, new code: 0.048 sec.
    1.2GHz Athlon, 133MHz DDR: 0.084 sec

    [snip]

    Gee. Over 2.5 times faster....

    (emphasis mine) duh?

  • The Pentium Pro was a awesome chip at the time. It is what helped keep the PowerPC from making it to the mass market ( OK, Apple's waffling on PREP and then CHRP was the final straw.... ). The public was suckered by Microsoft in taking a 16bit OS when OS/2 rocked on the PPro. IMO, Microsoft screwed Intel at that time and they've never recovered. Intel had to hack the P6 core to make it run 16bit apps ( the 32bit 386 shipped ~7 yrs earler! ) and to keep the market interested in Intel chips they hacked MMX into the old P5.

    Intel is on the ropes and only by tuning small parts of the core OS to run at the "marketed speed" can they keep fooling the public into thinking it's a faster chip.

    AMD learned that the public thinks clock-speed is the measuring stick back when they had faster chips at lower clock speeds. They now make sure their clock speed outperforms Intels at equal speeds but Intel realized this too and played tricks with how it spec's it's speeds.....

    The internet is now very pervasive and Intels tricks are being exposed daily. It is time to sell Intel stock. IMHO

    LoB

  • The thing that hurt the Pentium Pro was the fact the CPU core was over-optimized for 32-bit code, so the Pentium Pro 200 MHz ran Windows 95/98 like a Pentium 166 MHz CPU.

    I believe Intel tweaked the P6 core of the Pentium Pro when it was adapted for the Pentium II core, so it ran 16-bit code quite a bit faster. It's the Pentium II core that became the basis for the Celeron and Pentium III CPU's.
  • The idea is, if your fan breaks, your Pentium4 won't melt, it'll just run a little slower. Don't try that with your Athlon!

    my motherboard has temp sensors(as do most motherboards these days), that will give a warning beep and eventually shut down the pc.

    some motherboards/software even clock your fan RPMs so if it's 0, it will tell you.

  • Thanks for an actual informative post, a rarity here on /.

    Peace,
    (jfb)
  • And their SMP-optimised server version will be named "Sledgehammer."

    --
  • Is it me or is there a strong familial resemblance between Jerry Sanders [tv.com] and Colonel Sanders [kfc.com]? Maybe the Colonel faked his own death to take over AMD? Think about it.

    F.O. Dobbs
  • AMD is a smaller, more nimble company than Intel; it is easier for them to adopt new manufacturing processes (or new anything for that matter). As long as AMD doesn't outgrow itself it should be able to beat Intel to the punch quite often.
  • > Third, having a bunch of useless 64-bit circuts
    > in a consumer-bound chip is the definition of a
    > marketing kludge.

    No.

    There are some people who need 64-bit addressing. Hammer is going to be the cheapest, fastest 64-bit CPU around. Some people are going to notice that and take advantage of it.

    Also, the 64-bit "long mode" has advantages other than just providing 64-bit operations. It provides double the number of general purpose registers, and also a new "IP-relative" addressing mode that will make shared library code smaller and faster. Many apps should run faster in this mode even if they don't need a 64-bit address space. Some people are going to take advantage of that too.

    Finally, it will take a while for stuff to get ported to long mode. Even if most people aren't using the mode, it's great to have it available to developers.
  • Why bother with the P4? because it's the latest technology. You are interested in the latest technology, aren't you?

    GIMPS is the distributed project which searches for very large prime numbers. The software used, Prime95, has been widely hailed as the most efficient FFT program ever written for the x86 architecture. The writer, George Woltman, recently posted that latest timing for the P4 version of the FFT code:

    1.4GHz P4, old code: 0.126 sec.

    1.4GHz P4, new code: 0.048 sec.
    1.2GHz Athlon, 133MHz DDR: 0.084 sec.

    I have a few more optimizations up my sleeve. I think my goal of 0.040 seconds is achievable.

    Gee. Over 2.5 times faster. From what I can see, the deal with Intel is that they have the fastest mass-market processor on the planet, but it's going to take awhile for the software industry to catch up.

  • Tunneling effects won't be important until you reach barrier widths of around 50 Angstroms.

    Ummm, have you seen what the gate oxide thicknesses are on these transistors? We are talking about 20-30 Angstroms. That would be the barrier width for the gate to channel, and yes, we do see tunnelling currents. There are many other issues to be dealt with, but yes, we do have tunnelling problems at the levels we are running today, that is why Fowler-Nordheim tunnelling models are now standard on device simulation packages. No, it isn't a bunch of crap, people just apply it to the wrong dimension.
  • Thats actually what I thought at first, too. Then I looked it up here [amd.com]. The little box with "Clawhammer" in it also says "w/ x86-64 technology", which is their way of saying "it runs 64-bit." It's just made for 1-2 processor configurations, while the Sledgehammer is for bigger SMPs (like up to 8).
  • > Did someone hit them with a stupid stick?

    Would that be the same stupid stick that has been going around Microsoft for the last few years?

  • I can answer 4)
    The sapphire SOI stuff, was mostly by government contract, for circuitry that was going to operate in space. It turns out that sapphire offers good shielding vs. radiation. I would not be surprised to find out that there are still things that are manufactured on saphire for the same reason, but it was a specialized process, and never really intended for large scale commercial use AFAIK.
    IBM's process is what is know as a SIMOX process, where they implant oxygen at very high energies into a silicon wafer, before they start to process the wafer. They then anneal the wafer (heat it up) so that the implanted oxygen will combine with the silicon to form silicon dioxide. The problems with this process are that oxygen is big, so when you implant it at these high energies, it causes a lot of damage to the silicon, which is hard to anneal out, so your defect densities tend to be very high, which means you get lower yields. Also, it is hard to control the implantation depth of the oxygen, and for various reasons, the depth of the barried oxide layer happens to be very important (it is more important that it is uniform, than the actual depth, unless you are designing fully depleted devices, which they are not).
    Also, the oxide layer which is created after the annealing process tends to be low quality.
    However, you do get a significant performance, and/or heat dissipation improvement from SOI. OTOH, you get significantly higher leakage, and hysterisis (sp?) in the threshold voltage, which means for dynamic logic, you are going to need more margin on your holders. To get the full advantage from SOI, you really need to design your chip from scratch to take advantage of it (and avoid the pitfalls), and it is not clear to me that AMD has done that. They could be in for a very difficult debug effort on this chip.
  • 99.99999% of the old m68k apps ran just fine on a powerpc,

    Oh, no, the Mac fanatics...

    The big problem was the FPU. The 68K family has an 80-bit FPU, but the PPC only has a 64-bit FPU. (That was an IBM thing; IBM mainframes had a 64-bit FPU, and so when they did a RISC machine...) Apple dealt with this problem by not putting FPU emulation in the 68K emulator. This killed off all the engineering apps, and another market segment was lost by the Mac. The mainstream engineering apps, like AutoCAD and various electronic desigh tools, were never ported to PPC.

    Yes, there was a software FPU emulator, but it was really slow and Apple didn't support it.

    I still keep a Mac IIci around so I can run Working Model.

  • The PII was actually slower than the PPro when it first came out in a very real sense (they had to sacrifice the PPro's nice cache to fit in the MMX stuff).

    This is demonstrated to a point by the fact that the Pentium II Overdrive (PII that fits in the PPro's Socket 8) at 333 MHz is actually faster than a "Real" Pentium II at 333 MHz.

    Ian
  • So THAT is why you get all the chicks.

    Yeah, he threatens 'em with a ten inch claw hammer.


    --
    ALL YOUR KARMA ARE BELONG TO US

  • Actually what I think ought to be pointed out is not just size and heat issues, but the fact that it is 64bits and still fully compatible with x86 as it stands today...

    So what you're saying is, it's like a PowerPC; It's got a new instruction set, and it's 64 a true 64 bit architecture, but it handles x86 instructions as well, probably through some mutated sliced-up K5 or K7 core (why would they even try to use the K6?) kind of like PPC would run 68k instructions.

    I'm very interested in seeing the classic "Compare and Contrast" between IBMotorola's way of doing this :) and AMD's. Does anyone have any input on that?


    --
    ALL YOUR KARMA ARE BELONG TO US

  • Q3 '03: Killer Rabbit

    Q4 '03: Holy Hand Grenade

    Q1 '04: Chip that says "neeee!"

    Once again, proving the stereotype that geeks always quote Monty Python.

  • CNet response: "..square, round. Whatever...."


  • You are correct: a large number of motherboards have thermal sensors that connect to the fan's voltage regulator.

    However, the time it takes for the off-die sensor to respond to on-die overheating is far too long (on the order of msec). This lag in the off-die feedback loop makes it essentially useless as a thermal control device for CPUs, especially when we're in the gigahertz-plus operating frequencies.

    ---
  • Yet again, AMD shows that a little engineering can go a loooong way. I can't wait to see the benchmark results for the clawhammer. Am I the only one to notice that intel's been choking incredibly hard latlely? Look at the P4 mobo requirements. An Additional 6 volt AND 12 volt connectors. REQUIRES a copper plate between CPU and Aluminium fins on the heat sink. Heat sink needs to be BOLTED to the chasis. Am I the only one to think Intel's just given up trying any more?
  • Actually what I think ought to be pointed out is not just size and heat issues, but the fact that it is 64bits and still fully compatible with x86 as it stands today... So when 64bit applications are in mass production (there's already efforts by M$, the Linux community and I'm guessing the *BSD community too) they'll naturally be faster & more efficient than the current instruction set... I mean you can now manipulate 64bits at one time rather than just 32bits, and all without touching an MMX &/or SSE register!
  • I don't have numbers on the Clawhammer, of course, but if its heritage is any guide, it will be very hot:
    http://www.tech-report.com/cpu/ [tech-report.com]

    Somehow, I manage to keep my overclocked K7-1050 at a relatively cool 42C, but I have the feeling that it could vaporise an ice cube in five seconds if I were to remove the heatsink.

    (end comment) */ }

  • Clawhammers are going to be cheaper than Durons are currently.
  • AMD is posied to take over a much larger chunk of the microprocessor market.

    Probably, but AMD really needs to come up with a marketing campaign that drives home the point that raw MHz does NOT mean raw performance. We geeks know AMD blows the PIII away and puts the P4 in a column with an asterisk (* "until apps are optimized")

    That said - just got our new 1GHz 266FSB Athlon server going with IBM Ultrastar SCSI disks. Oh my lord! What a sweet setup. I cannot believe a top line mobo (A7V133) with a 1GHz Athlon (266FBS) cost me about $300. I've never seen Perl and apache compile so fast - and I've got a 700MHz Athlon (non TBird) SCSI based desktop.

    Go AMD Go!

    --

  • rather, it's how you use those cycles...

    yeah, baby..
  • This is great, but how about a high quality MP chipset? -ted

  • Smaller transistor sizes may mean less heat but a smaller chip size is no guarantee. For instance the current Thunderbird is smaller than the P4 but generates more heat than the P4.

    As for the less stuff in the waffer vibrating argument, that doesn't really make any sense. The smaller the transistors the higher the gate density and thus the more stuff per unit area vibrating.

    The advantage is what you said in your first sentence, lower voltage requirements. With smaller transistors you can operate at lower voltages. The problem is that you can also use higher densities. Thus while heat generated per transistors drops, you have more transistors per unit area and overall heat production rises. This is why the PIII at 106 mm^2 (28+ million transitors) generates more heat than a Pentium which was 161 mm^2 (3+ million transistors). You can realize a temperature drop my spreading the transistors out but then you lose the second advantage of transistor size, yield rate. As you increase the densisty your die size shrinks which causes an increase in yield (the majority of garbage chips are caused by substrate imperfections).

    Anyway, by the time AMD releases this thing the P4 will be on 0.13 micron tech as well giving it a size of 116 mm^2. Not much different than the AMD size of 105 mm^2.

    Myrv
  • I agree that Intel is in trouble with their Itanium. It will probably run GCC and Sun JDK reasonably well (and VC++ as well as VC++ ever runs), but it will be nearly impossible for mere mortals to develop good compiler backends for other compilers.

    Intel should pray that their transition is as smooth as Apple's 68k->PPC changeover; I don't think it will be. Apple really made that work as well as possible. In fact, Apple seems to be pretty good at that: the MacOS9->MacOSX transition looks like it's going OK as well.

  • by Anonymous Coward on Friday April 27, 2001 @07:49AM (#262288)
    105 millimeters square

    105mm square is larger than any chip that I've ever heard of... that's four inches per side; I can only presume that they meant to say 105 square millimeters.

  • by Anonymous Coward on Friday April 27, 2001 @09:08AM (#262289)
    Duron is currently 100mm (al) while Athlon is 120mm (cu).. That the Clawhammer is 105mm doesn't seem that impressive given the shrink from .18 to .13 SOI. Especially since the PentiumIV will be down to 116mm (rumor: and possibly have an upgrade from 256K L2 to 512K L2 cache!) The fact that the Athlon is currently half the size of the PentiumIV and is overall slightly faster is (was) news worthy. The fact that the clawhammer is going to only be 91% of the size of the PentiumIV isn't really a big deal. Just because the PentiumIV takes 10% more die space isn't going to add up to much, especially since Intel has much more than 10% more fab space to throw at it. According to Ace's Hardware's [aceshardware.com] 2001 shareholder's meeting coverage the Clawhammer will be introduced 2nd half of 2002. Anybody want to guess at what "But it will deliver more than three times the clock speed of the first Athlon..." means? According to sandpile [sandpile.org] the first Athlon was introduced on a .25 process at 500, 550, and 600Mhz Jun 23rd 1999, but went up to 700Mhz by Oct 4th before switching to a .18 micron process. I guess this means the clawhammer, with its .13micro SOI manufacturing and architectural enhancements over a standard K7, will reach atleast 1.5Ghz 2H 2002? I should hope so! 2Ghz seems like a better low end guess for clock speed, but it'll probably be closer to 2.5Ghz than 2..
  • by KFury ( 19522 ) on Friday April 27, 2001 @08:39AM (#262290) Homepage
    Put another way:

    It's not the size, it's the frequency?

    (let's not take 'megahertz' too literally now...)

    Kevin Fox
    --
  • by barawn ( 25691 ) on Friday April 27, 2001 @09:25AM (#262291) Homepage
    Electrons don't have width. They are fundamental point particles (to our best knowledge).

    Tunneling will become an issue roughly when you're within a couple of angstroms of the surface (~ radius of a hydrogen atom or so).

    It's highly unlikely that electron tunneling will ever be a problem - if you ever build a chip that electron tunneling might be a concern on, I guarantee you're going to have defects in that chip that short two of the wires, rather than needing to worry about electron tunneling. Without major overhauls in process control, this just won't happen.

    On topic: AMD *has* had massive screwups with their processors - it just isn't advertised as it doesn't affect most people. Except me, of course - I have an old AMD-K6 200 with the bug that causes it to be unstable with >32MB of RAM. Happy day.

    Though it should be noted that AMD did offer to replace these processors- I just didn't know about it till I got Linux, and it told me.
  • by svirre ( 39068 ) on Friday April 27, 2001 @09:12AM (#262292)
    Regular structures like memory can (and are) be made with redundancy. When the die is checked any defective rows are identified and a laser cuts predefined tracks to route the memory interface to the functioning rows.

    Since memory make up a significant part of a modern CPU this improves yield quite a bit.

    Also I believe some designs have been able to cut out non-functioning ALUs so they can use those dies for low cost versions.
  • by goldmeer ( 65554 ) on Friday April 27, 2001 @08:39AM (#262293)
    The i386 processor has a die size of 82mm2 using a .8u process.
    Once they start cranking these babies out at .13u, that die size shrinks to 13.3mm2. (That's 3.7mm per side roughly)
    I expect they can yeild ~15,000 functional units per 30cm wafer (about 21,000mm2).
    Let's see the obligitory cluster of these!!!

    -Joe

    *Note to moderators: This entire post is humor.

  • by Darnit ( 75420 ) on Friday April 27, 2001 @08:06AM (#262294)
    Hardware engineers are usually Electrical Engineers and have taken quite a few physics courses, especially if they want to go into this type of design. At the same time these people need to look into high frequency radar type classes so they can do all the impedance and transmission line calculations. When this stuff starts happening your program crashes. Not even Linux can overcome those type of obstacles.

    On a side note. Even if AMD does really well and Intel eventually loses the majority of the market share on X86, Intel still wins because AMD has to pay Intel for the patent use on X86.

    Trust me when I say you are not smarter than them.
  • by JoeGee ( 85189 ) on Friday April 27, 2001 @09:39AM (#262295)
    1. Probably not, this was rumored but as far as I know never confirmed. I suspect that since the technology required to isolate an isotopically pure form of any element is rather exotic and expensive this would not be an affordable option (search "nation states, uranium refining, nuclear club" on Yahoo.)

    2. Probably not, see above. I suspect a die shrink and optimizations are the more likely causes of any heat reduction.

    3. Yes.

    4. IBM is the patent holder on the SOI process AMD is reported to be using, see http://www.chips.ibm.com/bluelogic/showcase/soi/ap pr1.html [ibm.com].
  • by duplicate-nickname ( 87112 ) on Friday April 27, 2001 @07:55AM (#262296) Homepage
    AMD will be releasing a processor 1/2 the size of the current P4. Note....that says CURRENT! When AMD will be releasing Clawhammer, Intel will also be releasing there new processor with a 0.13 micron core name Northwood. Clawhammer will be 103 square millimeters and Northwood will be 116. What's the big deal?

    Would Cnet write an article that states AMD will release a processor in 2 years that is 2x as fast as the current P4? I doubt it....who cares about comparing future size/speed/etc to current standards. We all know things get faster and smaller.

    ÕÕ

  • by haroldK ( 96625 ) <harold AT princessharold DOT net> on Friday April 27, 2001 @08:18AM (#262297)
    Since when have Intel processors been gracefull? Also, they have better luck at actually #producing# the chips they say they can. My Athlon hasn't been recalled, and that's more than you can say about the P!!!. Also, what's the deal with supposedly next gen CPUs that perform the same or worse than previous gen CPUs in some benchmarks? Seems that with your beloved SSE and higher clock speed, things don't get any better. Maybe Intel needs something with raw processing power that's priced in the consumer range (and no, Xeon's are not priced in the consumer range).
  • by jejones ( 115979 ) on Friday April 27, 2001 @08:00AM (#262298) Journal
    Not only that, but I recall an article a while back about AMD moving to making chips out of just the isotope of silicon that conducts heat better; it claimed they had a Duron made that way running fine using just a heat sink. My ears will thank them...
  • ...when your design team is lead by engineers instead of marketers. Rumor has it that Intel used to be that way too. I have to say that Intels critical design decisions in the last few years(RAMBUS, P-IVs crippled floating point) have made me somewhat nauseas.

    Thank God we have AMD!

  • by rneches ( 160120 ) on Friday April 27, 2001 @08:27AM (#262300) Homepage
    I should clarify this - I don't mean it's slow in an absoulute sense. I mean it's slow compaired to what one would expect it to be.

    You mentioned the PPC chip - with each successive generation of the PPC, it's made a jump in power and performance. Usually, the jump is pretty significant, like with the G3 to the G4 and the 601 to the 604.

    Intel used to be able to produce those kinds of results - like the 286 to 386 to 486 to pentium. But then they seem to have petered out - the PPro stunk, even in 32 bit mode, compaired to its OWN design spec. It was strangled by really bad memory bandwidth and heat thrown off by the cache. The PII was actually slower than the PPro when it first came out in a very real sense (they had to sacrifice the PPro's nice cache to fit in the MMX stuff). The PIII was basically a fix for the PII, for all I can tell - it has some more spiffy instructions that no one seems to use for anything, and they put a decent cache back in, like with the late PII models.

    I'm not an expert, but that seems to be how things played out, more or less. I'm just surprised Intel is still faltering when they've got so much talent on their payrole.

    --

  • by nettarzan ( 161548 ) on Friday April 27, 2001 @09:30AM (#262301)
    This news post and the title seems biased towards AMD. By the time the Clawhammer is widely available, both Intel P4 and AMD will be of more or less same size. The size of of P4 will be 116 millimeters square to that Clawhammer's 105 millimeters square. I don't see anything unique to what is being done by AMD (well may be the cost is unique, but Intel is also cutting down now thanks to AMD).
  • by Alien54 ( 180860 ) on Friday April 27, 2001 @08:04AM (#262302) Journal
    You got to wonder how fragile these things are at the time of manufacter. There are the usual concerns about cosmic rays, etc. So I wonder about the rundundancy built into the design.

    I recall that on a typical wafer as made many years ago, the waste of nonfunctional CPUs was some absurd percentage. I wonder what it is with these things?

    Check out the Vinny the Vampire [eplugz.com] comic strip

  • You're being misleading.

    First, this is a realiability mechanism in addition to the catastrophic failure sensor. AMD has neither of these features!!! The idea is, if your fan breaks, your Pentium4 won't melt, it'll just run a little slower. Don't try that with your Athlon! This is an advantage over the other sensor, which has been around since Pentium II days: it shuts down the CPU when it gets too hot so you can reboot (AMD also doesn't have that protection). So instead of a bluescreen or system hang it just gets slower. That's a BIG difference over AMDs crap, um, parts.

    Also, this throttling thingy toggles a pin on the package when active, and Tom Pabst nor Annandtech has ever seen a P4 enter this slow mode on any benchmarks.

    As for the power, you forgot to check Athlon's maximum power rating in their data sheet.

    1333 70 W 63 W 95 C

    That's 70 W at 1.33 MHz. Not too shabby if the P4 operates at 1.5 at the same power as Athlon, when you consider scaling athlon to 1.5 would put it at ~78.9 W.

    Also notice the games AMD plays: they measure power at 95 C junction temp!!, Intel is at 90, AMD uses 42 C Ambient case!!, intel uses 45. This means Intel is far more conservative then AMD, which obviously is barely on the edge of spec'ing a reliable thermal envelope with those numbers.


    ---
  • by Tomoshi ( 201049 ) on Friday April 27, 2001 @08:04AM (#262304)
    What about the handheld device version, the tackhammer?
  • by Drakantus ( 226374 ) on Friday April 27, 2001 @08:43AM (#262305)
    No, it IS 1.25cmX1.25cm. Keep in mind the actual cpu core is smaller than the packaging, which includes the pins.
  • by Shoten ( 260439 ) on Friday April 27, 2001 @07:51AM (#262306)
    I wonder how the chips made with the new .13 micron spec hold up when overclocked? I would imagine that there's less tolerance for variations. Also, the SOI...I wonder how well THAT would tolerate overclocking. Might there be a bit of trouble with heat transfer from one layer to another that gets worse when you're running it very hot with a very cold surface above it, as is done with a peltier?
  • by janpod66 ( 323734 ) on Friday April 27, 2001 @10:05AM (#262307)
    Intel is on the ropes and only by tuning small parts of the core OS to run at the "marketed speed" can they keep fooling the public into thinking it's a faster chip.

    The P4 probably has many flaws, but for compute-intensive applications, the fastest P4 is significantly faster than the fastest Athlon. If you haven't benchmarked it yourself, check out the benchmarks at spec.org [spec.org].

  • by Lethyos ( 408045 ) on Friday April 27, 2001 @08:09AM (#262308) Journal
    and instructions designed to improve internet connect speed to their Pentium 4

    The Pentium4 is your modem or NIC now? So bascially, I can just screw DSL and stick with my 28.8 and get faster internet access? Jesus, you're a retard!

    AMD's practice of brute force processing is innefficient and wasteful.

    Wow, I guess we no longer need faster processors, Beowulf clusters, and distributed computing since you say they're innefficient and wasteful.

    It requires more power, and outputs more heat.

    Uh no, we're talking about less power and less heat... smaller chips, smaller fabication...

    Not only that, but AMD processors don't even have built-in thermal protection, so if their processor gets TOO hot, you'll end up burning out your processor.

    Oh yes, it's more efficient to kill off clock cycles waiting for your processor to cool instead of making a chip that produces less heat or to use a... DAH-DUM-DADA... HEATSINK.

    Your email address is a hotmail.com. No wonder.
  • by RALE007 ( 445837 ) on Friday April 27, 2001 @08:30AM (#262309)
    From the article: "Smaller chips are cheaper to manufacture, so you can either price them lower or gather more margin from them. All of those arguments are valid," said Dean McCarron, principal analyst at Mercury Research."

    We all know AMD's strategy is market share, not so much the margin. What this means is lower prices overall because intel will have to compete. Quit your whining about "intel's better" (besides they're not) and just be happy that there's some competition and a company like AMD fighting for better market share with a better product. If you only buy for clock cycles and name brand you're not make in intelligent purchase. Kudos AMD. If it wasn't for them processors would be half the current speed at twice the cost because of the lack of competition and the innovation needed to win at competition.

  • by Anonymous Coward on Friday April 27, 2001 @08:03AM (#262310)
    ...Intel is in big trouble, AMD is posied to take over a much larger chunk of the microprocessor market.

    Intel is pushing a very anemic P4, which can't keep up with an Athlon running a clock speed approx. 25% slower (at least on anything approaching real-world computer usage). On top of that they're getting ready to bet the company on the IA-64 architecture which is going to have more compatibility and conversion issues than you can count, even while it's competing with AMD's more nimble and better performing hammer series.

    This horse race is just starting to get interesting...

  • Nobody is going to make the mistake Apple made when they went to PowerPC and had most apps (and for years, most of the OS) running in software emulation.

    That wasn't a mistake; in fact I challenge you to name a more flawless example of a major technology transition. 99.99999% of the old m68k apps ran just fine on a powerpc, even better as the speed of the chips increaed. Neither did the legacy code noticably slow down most operations, that came from the lack of protected memory.
  • by Snarfvs Maximvs ( 28022 ) on Friday April 27, 2001 @07:46AM (#262312)
    They're comparing sizes of an in-production chip made on a .18 micron process to one that WILL be made on a .13 micron process. A P4 on the .13 process is approximately the same size as the Clawhammer.

    Sigh...

  • by MatriXOracle ( 33400 ) on Friday April 27, 2001 @06:00PM (#262313) Homepage
    I quote from the arcticle:

    "Intel's forthcoming 0.13-micron Pentium 4 chip, code-named Northwood, is expected to be about 116 millimeters square, much smaller than current 0.18-micron chips' 217 millimeters square."

    It's a perfectly fair comparison: Pentium 4 is 116 mm square on 0.13 technology, Clawhammer is 105 mm square.

    Sure the difference isn't that great, but it's the simple fact that the P4 is a 7th generation, 32-bit only chip, while Clawhammer is 8th generation, with 32- and 64-bit capability. And it's STILL smaller.
  • by Tower ( 37395 ) on Friday April 27, 2001 @08:37AM (#262314)
    If I had points, I'd mod this way up...

    From < A HREF="http://www.chips.ibm.com/bluelogic/showcase/ soi/">
    http://www.chips.ibm.com/bluelogic/showcase/soi/ &l t;/A>
    "SOI technology improves performance over bulk CMOS technology by 25 to 35%, equivalent to two years of bulk CMOS advances. SOI technology also brings power use advantages of 1.7 to 3 times. IBM is currently working with many circuit designers and product groups that are designing with SOI technology. The company expects SOI to eventually replace bulk CMOS as the most commonly used substrate for advanced CMOS in mainstream microprocessors and other emerging wireless electronic devices requiring low power."

    A power use adantage of 1.7 to 3 times... that's pretty nice. There's a good pdf on that site (linked from the page above). Read it.
    --
  • by Foxman98 ( 37487 ) on Friday April 27, 2001 @07:43AM (#262315) Homepage
    Ok ok, it's nice that it'll be smaller. What I want to know is what kind of heat is this generating? Sure the chip is half the size. But if the heatsink/fan? I mean the fact that a Pentium 4 requires a frickin heatsink that has to be attach to the case else it would rip the chip out is pretty damn silly. As has been mentioned before it's ultimately not the Mhz / Ghz that counts for raw performance. While I understand AMD and Intel's constant push for higher Mhz I think people need to be aware (by people I mean Joe Consumer) that there are other issues that are becoming much more important than the cpu. Graphics card... Hard drive speed / interface.

    Pretty damn small chip though :-)

  • Now come on. By insulating the transistors from the rest of the silicon, you're dissipating less power. That's the whole point of SOI. I suppose we could petition the chip manufaturers to use germanium semiconductors, but you're more likely to lose the CPU without a good heatsink. Granted, it'll have more transistors, but they'll be smaller and dissipate less power because of the size. I think AMD might surprise us with this one. I didn't find anything about the actual power savings from SOI or moving to a smaller transistor, but I'd be willing to bet it'll dissipate the same amount of power as the current Athlon. I'd have to belive they're looking into this heavily; it's a big issue nowadays.
  • by alexburke ( 119254 ) <slashdotmail@alexburke . c a> on Saturday April 28, 2001 @12:54AM (#262317)
    Speaking of Pintos, did you know that when Ford originally introduced the Pinto into Brazil, it sold *very* poorly. They couldn't figure out why until someone in the know explained it to them.

    Pinto is Portugese slang for small male genitals. No joke.

    Ford changed the name, and sales picked up substantially.

    --
  • by Metrol ( 147060 ) on Friday April 27, 2001 @08:19AM (#262318) Homepage
    What happens when a very powerful computer can be small (concealable)?

    Well, you might not see that concealed 10Gig processor the size of a nail clipping. On the other hand, it might be a wee bit tougher hiding that car battery with the 1200 cranking amps to keep it going. What's worse, trying to get that darn liquid nitrogen tank hidden away.

    You don't need super hi-tech to play big brother anyway. We have the income tax to monitor every penny you make. We have a phone system that congress okay'd nearly unlimited tapping abilities on. Low tech servers running at ISP's monitoring traffic for the FBI. Egads, we even have folks begging to have chips installed into our TV's to monitor "incorrect" programs for our children.

    If you're going to be paranoid, at least do so concerning to those things that really are a danger to privacy. A faster/smaller chip isn't the concern. It's them bigger/slower governments that individuals need to be wary of.
  • by rneches ( 160120 ) on Friday April 27, 2001 @07:46AM (#262319) Homepage
    What's the deal with Intel? Why did they bother with the P4? It's a disaster, if you ask me. It's slow, it overheats, no software (allright, QuakeIII) can use it, and it's going to be obsolete in a few months when they switch to a new form factor. Plus, you have to buy RIMMs.

    Did someone hit them with a stupid stick?

    If the ClawHammer is even a little bit cooler than the Thunderbird (like 15% more awsome), it'll just beat the pants off the P4.

    --

  • by simonwagstaff ( 173538 ) on Friday April 27, 2001 @08:05AM (#262320) Homepage
    That Clawhammer will be smaller than a P4 sounds nice, but not all that relevant to me in the near future (trying to be more trailing edge than bleeding edge in the interest of my wallet of late;)).

    What does interest me is the idea that the equivalent to today's highest-end-and-beyond chips will be be smaller packages. OK, ok, that's an obvious point given the March of Progress thus far, right? But when it comes to *lower* powered devices, this is particularly cool, because they're going to be even smaller.

    Remember, the power in an iPaq handheld would have been the Computer Buyer's Holy Grail not long ago, and it's only in comparison with the amazingly powerful processors available lo even at WalMart that it appears wimpy. Not long from now, you will be able to buy a computer over the salesperson's objection that "b-b-b-b-but that's only the power equivalent of a Pentium 4 at 3 Ghz! You'll never get Office 2004 to run on *that*!"

    Really, though I like the convenience of the various plug-in buses of desktop PCs, I really wish my PC case could be more the size of a laptop, and getting processors, motherboards, etc smaller would be a nice step toward (at least household) ubiquity.

    simon
  • by Maax ( 223760 ) on Friday April 27, 2001 @07:56AM (#262321)

    Here's the comment from a Inquest white paper [inqst.com]:

    : Intel's Thermal Design Guide has revealed that the absolute maximum power dissipation of the 1.5GHz P4 is actually 72.9 watts. This is 33% higher than the published system design specification, and essentially identical to the 1.33 GHz Athlon. If power dissipation is sustained at a level higher than 54.7 watts thermal overload can occur. In order to deal with this, a mechanism called thermal throttling is used. If performance critical applications drive the CPU above a predetermined temperature, the CPU is halted with a 50% duty cycle (alternating 2 microseconds on; 2 microseconds off) until it cools down. This effectively turns your 1.5GHz processor into a 750MHz processor - just at the moment you demand peak performance. On the other hand, you will probably still be able to check your email at 1.5GHz. This scheme is described on page 23 of Intel's P4 Thermal Design Guide. ... Intel's motto... "1.7GHz. Its there. Unless you need it."

    It's still on the ArsTechnica [arstechnica.com] home page.

  • by tempmpi ( 233132 ) on Friday April 27, 2001 @08:05AM (#262322)
    >They include AMD's plans to ship a 1.4GHz Athlon chip this quarter
    Well, that chip is already available at the local computer store. [kmelektronik.de](on the bottom of the page) 660 DM are about $300.
  • by blamanj ( 253811 ) on Friday April 27, 2001 @08:24AM (#262323)

    When scrolling quickly by, I though the subject of this article was a "clamwhammer". Boy, was that weird.

    How many clams could a clamwhammer wham
    if a clamwhammer could wham clams?

  • by Paul the Bold ( 264588 ) on Friday April 27, 2001 @08:15AM (#262324)
    The technology in the new chip is not as new as everybody is pretending it is. Yes, everybody likes to think that small size means tunneling and violates some law of quantum mechanics they heard somewhere. It's all crap, I say. Tunneling effects won't be important until you reach barrier widths of around 50 Angstroms. The uncertainty principle is much stranger than you think, and they are currently working on a single electron transistor (strange, but true, and does not violate any quantum mechanics).

    First, the small feature size quoted in the article has been researched for years. The main problem was the RC time delay. By cramming the devices so close together, the capacitance of the interconnects increased (remember, C~1/d). Since Al is usually used as an interconnect material (it plays nice with Si), there is a very high resistance (Al has 5x the resistivity of Cu) in traditional chips. That's why they started researching other materials, especially copper. Look up the dual damascene process for copper metalization, you will see the challenges involved. It's just exciting to see the small feature size finally released commercially. It means the technology is finally out of the research stage.

    In crystal growth, it was nice to hear some discussion of the 12-inch "John Holmes" wafer.
  • by AgentTim3 ( 447311 ) on Friday April 27, 2001 @08:48AM (#262325) Journal
    Intel is now moving forward with the "Chips that can slice, maim, and render our competition's chips senseless" Naming Scheme. In keeping with that, here's the next few chips they plan to release:

    Q3 '01: Hacksaw

    Q1 '02: Whirling Razor

    Q3 '02: Electron Accelerator with Mass de-Magnetizing eXtensions (MMX)

    Q4 '02: Lightning Fast Invisble Microchip of Flaming Destruction

    Q2 '03: Small Little Bunny Chip with Deceptively Sharp Pointy Teeth
  • by Anonymous Coward on Friday April 27, 2001 @07:46AM (#262326)
    They should compare AMD's 64-bit processor to Intel's 64-bit processor!
  • by sharkey ( 16670 ) on Friday April 27, 2001 @07:47AM (#262327)
    How big IS the Pentium 4 anyways? My claw hammer is about 10 inches long, to give me plenty of leverage when hammering nails. It also weighs in at right around a pound. Does this mean the Pentium 4 is about 20" across?

    --
  • by Tower ( 37395 ) on Friday April 27, 2001 @08:32AM (#262328)
    The Apple switch to PowerPC was one of the smartest and best examples of shaping up that has been done. Granted, there was a lot of software in emulation, but after a couple turns of the crank, that loss was more than gained back in raw speed.

    Kind of like the FX!32 emulator for NT on Alpha. At the time it was out (and still supported), the emulated apps on the Alpha massively outperformed the same code running natively on the newest Intel hardware (PPro and early P-IIs).
    --
  • by solios ( 53048 ) on Friday April 27, 2001 @08:27AM (#262329) Homepage
    So the PPC and the 68k were incompatable. Apple realized that they had to move onward and upward and the old 68k's weren't going to cut it, no way, no how. The PPC was what they needed, with the caveat that it was a totally different architecture. But the damned thing ran so much FASTER than the 68k that the second generation of PPC (603) was running 68k software *FASTER* than even the fastest Quadra could handle.

    In this fashion, Apple was able to get a next generation processor to market, and maintain compatability with existing (and now horribly outdated) hardware.

    HOW is that a *MISTAKE* ?
  • by Puk ( 80503 ) on Friday April 27, 2001 @07:43AM (#262330)
    At this rate, I'm never going to be able to meet my old goal of using my CPU as a stove, or even a hot plate. I had high hopes for 3dfx, or possibly even nVidia... And I guess there's always intel.

    I get hungry at work, damn it.

    -Puk
  • "My claw hammer is about 10 inches"

    So THAT is why you get all the chicks.

    (Sorry, couldn't resist.)

  • by Animats ( 122034 ) on Friday April 27, 2001 @08:01AM (#262332) Homepage
    I met the head of the Clawhammer effort when he spoke at EE380 at Stanford. He spoke about the Clawhammer architecture, although in 2000 he wasn't willing to say much about implementations. The Clawhammer is a straightforward application of current superscalar technology to a 64-bit x86-like architecture. It's very vanilla. It's the logical extension of x86; no more, no less.

    Intel's "Inanium", as it's called in Silicon Valley, is a wierd and painful machine. If you liked programming the Sony PS2, you'll love the Itanium. Nobody likes VILW machines; it's what you do when you can't make a more friendly architecture work fast enough.

    Intel's marketing operation, though, is getting design wins for the Inanium, even though that architecture needs a near-omniscient compiler to get good performance. Despite the drawbacks of the Itanium, it's going to get considerable market share.

    Both machines still run old x86 code. Nobody is going to make the mistake Apple made when they went to PowerPC and had most apps (and for years, most of the OS) running in software emulation.

  • I think that they suffered from this very problem.

    No, Intel just fucked up. Purely human error in designing the lookup tables for floating point division.

    Let's guarantee we are getting quality products (though from AMD, it's less than likely).

    Uhhh... yeah. Last I checked AMD made some pretty damn good parts and always has. AMD's chips haven't always been performance leaders, but to my knowledge they haven't had quite the cavalcade of errors intel has (F00F anyone?).

    Oh, and the part where you're rabbiting on about quantum tunneling, well, this is not a significant factor on the scale of a cpu. When the walls are the width of an electron, maybe... Even if an electron or two was heading south of the border, components are not triggered by one electron yet. Maybe in 50 years this will be a problem.

    Mod me down for being harsh if you want, I'll still be right and I've got karma to burn.


    --
    News for geeks in Austin: www.geekaustin.org [geekaustin.org]
  • by startled ( 144833 ) on Friday April 27, 2001 @08:53AM (#262334)
    Sorry myamid, but you're the one who screwed up this time. :)

    The Register: [theregister.co.uk] At the high end, ClawHammer will be AMD's first implementation of its 8th generation architecture. ClawHammer will feature the x86-64 technology aimed at rivalling Intel's IA-64 McKinley. Sampling in Q4 2001, ClawHammer will be SMP capable and go into production at the beginning of 2002.

    Silicon Strategies: [siliconstrategies.com] AMD also looks forward to bringing the 64-bit microprocessor generation to the desktop. A previously undisclosed version of AMD's 64-bit Hammer chip, Clawhammer, will begin sampling at the end of 2001 for desktops and server appliances and enter production in the first quarter of 2002. Sledgehammer, a 4- and 8-way capable part for servers, will sample in the first quarter of 2002 and ship a quarter later.

    I'd link to more, but it's all reprintings of the same press release, more or less.
  • >> Why did they bother with the P4? It's a disaster

    Well, any new release from Intel has been the "worst ever". When the Pentium Pro came, it was a "disaster" since it ran 16 bit code slower then the old Pentium. Noone cared about that it was twice as fast on 32bit code.. who writes 32bit code anyway ? ;)

    The P4 might look bad now, but Intel think they can clock it a lot higher. At least 2 Ghz, perhaps 10 in the future. The P3 wont go any futher then 1 Ghz.

    But right now you're right, and the rambus memory is way to expensive.

  • I disagree. Consider that a 64 bit chip is smaller than a 32 bit chip. That REALLY drives it home...

    REAL /.ers only have a karma of 49...
  • by nostradorkmus ( 209852 ) on Friday April 27, 2001 @08:29AM (#262337)
    There seem to be alot of comments here about heat and power consumption. This article isn't about heat or power; it's much more about cost. A smaller chip means more chips can be fit onto the same wafer and thereby bring down the cost of each chip.
    Whether the consumer sees any real savings isn't certain. AMD could choose to take a higher profit margin on each chip and pass nothing on to us. Also, a smaller process invariably means more chips come out as duds (cosmic rays and whatnot).
    But, a smaller chip isn't really meant to be a feature of a of a microprocessor, except in as much as it effects price. I think this was more of an announcement intended for the corporate/investment folks, not so much us.
  • From the C|Net Article:
    Intel shifts to a new manufacturing process around the same time Clawhammer hits the market.
    It's interesting to note that AMD is still about 3/4 of a release cycle ahead of Intel with regard to adoption of 0.13-micron manufacturing process. This is presumable a result of the relitive age of each companies manufacturing plants and the cost to retrofit rather than build new plants.

    -- CTH

    ---

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