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Submission + - SPAM: Intel Invests In Open-Source RISC-V Processors With a Billion Dollars

An anonymous reader writes: RISC-V International, the global open hardware standards organization has announced that Intel has joined RISC-V at the Premier membership level. Let that sink in for a minute. Intel, which has made billions from its closed-source, complex instruction set computer (CISC) x86 processors, is joining forces with RISC-V, the open-source reduced instruction set computer (RISC) CPU group. What next? Dogs and cats living together!? Dr. David Patterson, co-creator of RISC-V helped create it to be an open lingua franca for computer chips, a set of instructions that would be used by all chipmakers and owned by none. Today, Patterson said, "I'm delighted that Intel, the company that pioneered the microprocessor 50 years ago, is now a member of RISC-V International."

Why? Because Intel sees a future in which ARM, x86, and RISC-V all play major roles. In particular, Intel has already seen strong demand for more RISC-V intellectual property (IP) and chip offerings. Intel's not just giving this idea lip service. Intel also announced a new $1 billion fund to support early-stage foundry startups. Together Intel Capital and Intel Foundry Services (IFS) will prioritize investments in chip IP, software tools, innovative chip architectures, and advanced packaging technologies. Randhir Thakur, IFS President, said this new program will focus on two key strategic industry points: Enabling modular products with an open chiplet platform and supporting design approaches that leverage multiple instruction set architectures including and spanning x86, Arm, and RISC-V.

As part of these initiatives, IFS will sponsor an open-source software development platform. This will provide IP for all three of the leading ISAs chip architectures. RISC-V has always been about providing open modular building blocks. Together Intel and RISC-V will expand the RISC-V ecosystem and help drive its commercialization. [...] Intel is already offering RISC-V chips: It's Nios V processors based on RISC-V. Moving ahead Intel hopes its new RISC-V investment will speed up RISC-V's development.

Link to Original Source

Submission + - Experiment confirms that causality is fuzzy (physicsworld.com) 2

UpnAtom writes: The Institute of Physics' online magazine writes:

"In classical physics – and everyday life – there is a strict causal relationship between consecutive events. If a second event (B) happens after a first event (A), for example, then B cannot affect the outcome of A. This relationship, however, breaks down in quantum mechanics because the temporal spread of a particles’s wave function can be greater than the separation in time between A and B."

They report on an published study by the University of Queensland which "confirmed that quantum mechanics allows events to occur with no definite causal order."

What are the implications?

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