That’s funny, although unless you’re bumping up against your VM memory limit, it’s not such a problem. When you DO approach your memory limit, performance drops to a crawl. In the 32-bit days, I hated the fact that my colleagues in AI developed in Java instead of C++ for programs that worked on really huge datasets just because of this issue. The programs would be frozen on GC for as much time as they did computation. That doesn’t mean I hate Java; I really like it, but this was the wrong time to use it.
But a bigger problem is that Java VMs are memory-hungry. After a little while, a long-running Java app has grown to its maximum size and stays there tying up system resources that it’s not really using. This can happen in C too, but with Java, you can’t avoid allocating and freeing objects constantly, while you can keep memory allocation well under control in C/C++, keeping your process size small. You can’t keep your Java process size small AND have good performance.
BTW, despite this, I do all kinds of work in Java. Mostly server stuff and some swing. When I need speed, I use C and/or C++. When I want to do something like string processing or just want to hack together a one-off, I use Ruby. When I want to do symbolic math, I am forced to use Python (a language whose syntax I object to on moral grounds) because sympy is the awesomest thing ever.
My FAVORITE language? Probably Verilog. I’m a chip designer, so you can just assume that any piddling arguments you have over programming languages will just make me roll my eyes over how trivial the differences are. That’s like watching a Lutheran and a Methodist try to argue over the infinitessimally trivial differences in their religions. Just to piss people off for fun, I’m going to say that software languages (except maybe Haskell, which is scary for other reasons) are these arbitrary constructions that people argue about like religions. On the other hand, Verilog is grounded in reality and science; it has some rough edges too, but that is the way of science. (Our VHDL bretheren fully recognize that the two languages ultimately have the same semantics.)