As a computer Science major, I only had one class involving this sort of thing, and it used VHDL. We all hated VHDL, and though I've never even used Verilog, and have only seen if briefly, I've heard others say its much better to deal with the VHDL. But then again this is all from memories I have from 3 years ago, and like I said, I've never used Verilog, so take this with a grain of salt.