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Comment Sony: you are idiots (Score -1, Troll) 129

Why such massive computational power? Just to decode h264 streams and spend lots of money in centralized servers? For that there is no need for releasing a PS4, they could use current PS3 hardware, more than enough for receive and play such streams.

IMO, Sony will go bankrupt eventually. That is non-sense, and non-scalable.

Comment Dear Instagram: be cool, or die. (Score 1) 250

Key features of Instagram are image enhancement filters with pseudo HDR reconstruction, which is great, but it will be catched, the sooner or the later. So, unless they act in a *very* kind way, they'll die in favor of Twitter and Facebook. IMO, it makes no sense for some minor player to fool around with their temporary momentum: be nice, or die, you insensitive clods.

Comment Can be much complex (Score 1) 215

In addition to these metrics, other can be added as well, e.g.: post date, size, tabulation, punctuation, capitalization, regional vocabulary, etc. Also, once you can add frequency-space analysis, naive bayesian filters, in order to increase precision, or to probe against other texts. Anyone interested about investing in text-rewriter technology in order to both detect similarities and automatic-rewrite?

Comment Intel should preparel x86 replacement (Score 3, Interesting) 246

This article shows the obvious: Excluding caches, performance per transistor in Intel x86 CPUs is very low. As example, current best performance per clock in the Intel CPUs is the AVX (Core i5/i7 -Sandy and Ivy Bridge-), delivering up to 8 FLOP per cycle with AVX SIMD opcodes (2 SIMD ALUs) while in previous generations was just 4 FLOPS per cycle with SSE2/3/4 (just 1 SIMD ALU). Thats miserable (back in 2000, the Playstation 2 was already capable of FMAC opcodes with 8 FLOPs/clock per SIMD ALU!!!). As example, similar performance with 4 FLOP per cycle with one SIMD ALU, at one fraction of waffer area.

Here is a 50$ ARM general purpose multicore-CPU example for matching 999$ performance of fastests Intel Core i7 (e.g. i7-3770K 3.9GHz (peak), 4 CPU, 8 threads, 2 SIMD ALU/CPU = 8 SIMD ALUs = 64 FLOPs/clock -> 3.9*10^9Hz * 64 FLOP/s = 249.6 GFLOPS:
  • 4 x ARM OooE (e.g. Cortex A9-like) 2.0GHz with 2 SIMD FMAC-capable ALUs/CPU (ALU = 16 FLOPs/clock, i.e. 2 ALUs = 32 FLOPs/clock -> 4 * 2.0*10^9 * 2 * 16 = 256 GFLOPS
  • 4 * 32KB + 4*32KB (256KB) L1 full-speed code and data cache
  • 4 * 256KB (1MB) L2 half-speed cache
  • 2 MB L3 half-speed cache
  • 2 or 3 lane ring bus (cheaper interconnect).

For increasing integer and load/store performance, it could be achieved with pipeline and issue/execution modifications, using more functional units. The limit is to keep the OooE simple enough for avoiding wasting transistor in executing tons of instructions unnecesarily.

Comment Git is not that clever, yet (Score 2) 92

Chrome OS also has an autoupdate feature, however not as powerful, unified & transparent as when simply using git.

"clever" differential updates usually work this way (Chrome browser uses it or used it back in the day):

  • Unpacked blob version 1.
  • Packed blob version 1
  • Unpacked blob version 2.
  • Packed blob version 2.
  • Differential packed blobl version 2, taking version 1 as compression base dictionary (or any other differential scheme).

And Git has can not do that yet, because it uses diff + deflate, having far less scope than, e.g. LZMA with 500MB dictionary (requiring 5GB of memory for compressing it is acceptable if it is done just once per version).

Comment Next step: 40-50$ mobile phones (Score 4, Interesting) 342

Those pads have AllWinner A10/A13 SoC (ARM Cortex A8 @1.2GHz and GPU ARM Mali 400), 512MB of RAM, and 4GB of flash. I see no reason for not having mobile phones with similar technology (the AllWinner A10/A13 is a tiny SoC) for similar price (e.g. Broadcom or Qualcomm could add 3G easily and sell their own cost-killer SoC for smartphones). IMO, is going to change everything, as everyone will be able to have an smartphone.

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