I found a copy of the HDMI spec someone posted at Purdue:
https://engineering.purdue.edu/ece477/Webs/S12-Grp10/Datasheets/CEC_HDMI_Specification.pdf
Section 5.1.1 Link Architecture
"As shown in Figure 5-1, an HDMI link includes three TMDS Data channels and a single TMDS Clock channel. The TMDS Clock channel constantly runs at a rate proportional to the pixel rate of the transmitted video. During every cycle of the TMDS Clock channel, each of the three TMDS data channels transmits a 10-bit character. This 10-bit word is encoded using one of several different coding techniques.
The input stream to the Source’s encoding logic will contain video pixel, packet and control data. The packet data consists of audio and auxiliary data and associated error correction codes.
These data items are processed in a variety of ways and are presented to the TMDS encoder as either 2 bits of control data, 4 bits of packet data or 8 bits of video data per TMDS channel. The Source encodes one of these data types or encodes a Guard Band character on any given clockcycle."
The word packet is only used when describing packet and control data. Video data is transmitted as pixel data, with each color component going through a separate data link, remarkably like DVI...
Section 6.5 specifies how it draws pixels in RGB mode, which is the only mode HDMI and DVI share, and strangely enough they put the RGB pixels on the same data links as DVI does, in the same TMDS format.
Section 8.3.3 is titled "DVI/HDMI Device Discrimination" and specifies that any device that does not identify itself as an HDMI device in its EDID will be treated as a DVI device. Meaning it can't use all the extra features of HDMI.
Appendix C "Compatibility With DVI"
:
C.1 Requirement for DVI Compatibility All HDMI Sources shall be compatible with DVI 1.0 compliant sink devices (i.e. “monitors” or “displays”) through the use of a
passive cable converter. Likewise, all HDMI Sinks shall be compatible with DVI 1.0 compliant sources (i.e. “systems” or “hosts”) through the use of a similar
cable converter.
When communicating with a DVI device, an HDMI device shall operate according to the DVI 1.0 specification, "[...continues]
C.2 HDMI Source Requirements
When communicating with a DVI sink device, an HDMI Source shall operate in a mode compatible with that device. This requires that the Source operate under the following limitations:
Video pixel encoding shall be RGB.
No Video Guard Bands shall be used.
No Data Islands shall be transmitted.
An HDMI Source may transmit Video Data Periods without Guard Bands only when communicating to a DVI sink device or during the process of determining if the sink device is HDMI capable. An HDMI Source, upon power-up, reset or detection of a new sink device, shall assume that the sink device operates under DVI 1.0 limitations. An HDMI Source shall determine if the sink device is an HDMI Sink by following the rule(s) described in Section 8.3.3. Upon detection of an HDMI
Sink, the HDMI Source shall follow all of the HDMI Source-related requirements specified in this document.
All electrical and physical specifications in Section 4 shall be followed by the HDMI Source even when communicating with a DVI sink device.
C.3 HDMI Sink Requirements
When connected to a DVI source device, an HDMI Sink shall operate as a DVI 1.0 compliant sink with the exceptions outlined in Section C.1 above. A DVI source device will always be restricted in the following ways:
Only RGB pixel encoding is used.
There is no Guard Band on the Video Data Period.
There are no Data Islands transmitted.
An HDMI Sink, upon power-up, reset or detection of a new source device, shall assume that the source device is limited to the above behavior. Upon
the detection of an indication that the source is HDMI-capable, the HDMI Sink shall follow all of the HDMI Sink-related requirements specified
in this document.
All electrical and physical specifications in Section 4 of the HDMI Specification shall be followed by the HDMI Sink even when communicating with a DVI source device.
Section 4 details HDMI's TMDS implementation, which is substantially the same as DVI's, with this notice in section 4.2.5 titled "HDMI Sink TMDS Characteristics"
:
"There may be a risk of source damage if the Sink asserts a very high or very low voltage, such as beyond the maximum ratings in the DVI 1.0 specification, on any TMDS line during power-on or other power transitions. "
I found a copy of the
DVI 1.0 specification which specifies larger electrical tolerances than HDMI, hence HDMI's warning to adhere to HDMI's spec and not DVI's.
In other words, since HDMI is a superset of DVI, its saying unless the device identifies as an HDMI device, it will disable all/most of the features added by the HDMI spec. It clearly states,
twice that the two specifications are electrically compatible. In the next two sections of the specification it shows the pinouts of the DVI-D to HDMI adapters, which merely route the data-links around. HDMI runs within DVI's voltage tolerances, they use the same TMDS, the same everything, except HDMI supports many more features than DVI. HDMI's extra features don't make it electrically incompatible, that isn't the definition of electrical incompatibility. Intel's Slot 1 and AMD's Slot A where mechanically/physically the same connector, but rotated 180 degrees because they were
not electrically compatible.
In the end, yes, there are differences between the two specifications, but only with HDMI being a superset of DVI. Everything they share in common is done the same way. Semantics/definitions love to trip people up.
I suppose you are just confused as to the definition of electrical compatibility then.