Average Ratings 0 Ratings
Average Ratings 0 Ratings
Description
Ansys Exalto serves as an advanced post-LVS RLCk extraction software that empowers integrated circuit (IC) designers to effectively address unknown crosstalk between various components within the design hierarchy by extracting lumped-element parasitics and creating precise models for electrical, magnetic, and substrate coupling. This tool seamlessly integrates with a wide range of LVS software and can enhance the performance of any RC extraction tool you prefer. With Ansys Exalto's post-LVS RLCk extraction capabilities, IC designers are equipped to make accurate predictions regarding electromagnetic and substrate coupling effects, allowing for signoff on circuits that may have previously been deemed "too complex to analyze." The models that are extracted can be back-annotated to the schematic or netlist, ensuring compatibility with all circuit simulators. As the prevalence of RF and high-speed circuits continues to rise in contemporary silicon systems, electromagnetic coupling has become a primary factor that necessitates precise modeling to ensure the successful fabrication of silicon. Overall, Ansys Exalto represents a crucial advancement in circuit design, helping engineers navigate the complexities associated with modern electronic systems.
Description
Our advanced web platform significantly enhances the productivity of chip developers and verification engineers, allowing them to design and troubleshoot at a pace ten times quicker than before. With Verilator, users can effortlessly initiate and execute thousands of tests simultaneously with just one click. It also facilitates the easy sharing of test outcomes and waveforms within the organization, allows for tagging colleagues on specific signals, and provides robust tracking of test and regression failures. By utilizing Verilator to create Dockerized simulation binaries, we efficiently distribute test executions across our computing cluster, after which we gather the results and log files and have the option to rerun any tests that failed to produce waveforms. The incorporation of Docker ensures that the test executions are both consistent and reproducible. SiLogy ultimately boosts the efficiency of chip developers by shortening the time required for design and debugging processes. Prior to the advent of SiLogy, the leading method for diagnosing a failing test entailed manually copying lines from log files, analyzing waveforms on personal machines, or rerunning simulations that could take an inordinate amount of time, often spanning several days. Now, with our platform, engineers can focus more on innovation rather than being bogged down by cumbersome debugging processes.
API Access
Has API
No
API Access
Has API
No
Integrations
Docker
No
GitHub
No
Pricing Details
No price information available.
Free Trial
Yes
Free Version
No
Pricing Details
No price information available.
Free Trial
No
Free Version
No
Deployment
Web-Based
Yes
On-Premises
No
iPhone App
No
iPad App
No
Android App
No
Windows
No
Mac
No
Linux
No
Chromebook
No
Deployment
Web-Based
Yes
On-Premises
No
iPhone App
No
iPad App
No
Android App
No
Windows
No
Mac
No
Linux
No
Chromebook
No
Customer Support
Business Hours
No
Live Rep (24/7)
Yes
Online Support
No
Customer Support
Business Hours
No
Live Rep (24/7)
No
Online Support
Yes
Types of Training
Training Docs
Yes
Webinars
Yes
Live Training (Online)
Yes
In Person
No
Types of Training
Training Docs
No
Webinars
No
Live Training (Online)
Yes
In Person
No
Vendor Details
Company Name
Ansys
Founded
1970
Country
United States
Website
www.ansys.com/products/semiconductors/ansys-exalto
Vendor Details
Company Name
SiLogy
Founded
2023
Country
United States
Website
silogy.io
Product Features
Electrical Design
CAD Tools
No
Change Management
No
Collaboration
No
Compliance Management
No
Document Generation
No
Drag & Drop
No
Electrical Parts Catalog
No
Functions / Calculations
No
One Line Diagram
No
PLC Tools
No
Reusable Designs
No
Symbol Library
No
PCB Design
3D Visualization
No
Autorouting
No
Collaboration Tools
No
Component Library
No
Design Rule Check
No
Differential Pair Routing
No
Schematic Editor
No
Product Features
PCB Design
3D Visualization
No
Autorouting
No
Collaboration Tools
No
Component Library
No
Design Rule Check
No
Differential Pair Routing
No
Schematic Editor
No