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Comment Re:Where does this leave the nuclear option? (Score 1) 291

We also have a crapload of land which is doing nothing except letting sunlight fall on it and letting wind pass unimpeded across it.

We don't have a lack of sources of energy in Australia. More to the point, we don't have a lack of produced energy, either; we are producing far more power than we use, but thanks to distorted incentives (and not the carbon tax!), we are paying more for it than ever before. Where are you when we need you, o invisible hand?

Australia is unlikely to use nuclear power in the forseeable future for the simple reason that there's no need to. We have precisely the number of nuclear power plants that we need for our own research purposes. As for all that radioactive material, we're better off exporting it to countries that don't have any other realistic options.

Comment Re:Bullshit! (Score 1) 362

So you claim that I can't back up my statement of most, then agree with me using the same exact terminology.

No. You can't back up the claim that "most [...] results from a person saying that someone looks nice". Most sexual harassment is nowhere near as simple as that. An isolated instance of someone saying that someone else looks nice is not enough to trigger a sexual harassment complaint in most cases.

Having said that, I'm sure you can see how the context, or constantly commenting on someone's appearance, could easily end up in creepy territory.

Yet, this same phrase is repeated by propagandists as an example of sexual harassment.

Without knowing anything about who these "propagandists" are, or what they exactly said, and in what context they said it, it's hard to say.

Comment Re:Pairing? (Score 1) 236

THE goal of PowerPC was not to make it easy to emulate 68K and x86. It wasn't even A goal.

You might want to go back and read some press releases from the AIM alliance at that time. Or even look at the ISA: there are a lot of things in there that only make sense if you want to emulate m68k or x86. They were positioning PowerPC as a migration path from m68k and i386 systems and being able to emulate both at a reasonable speed was part of this strategy.

Comment Re:Intel (Score 5, Informative) 236

Spoken like someone who has no idea about the market at the time. The PowerPC was introduced in 1992, announced in 1991. At the time, Intel's flagship x86 part was the 486 but they were trying to kill the x86 line. They'd released the i860 (RISC, not x86-compatible) in 1989 and tech magazines were saying it would kill x86. Windows NT was originally written for the i860 and only later ported to x86, so even Windows looked like it might not be tied to x86 in the long term.

1992 saw the launch of the Alpha and MIPS R4K, and 1993 saw the SPARCv9 ISA. It didn't look like a 32-bit architecture that was hacked onto a legacy 16-bit ISA had much of a long-term future. IBM and Motorola were two of the biggest players in CPU manufacturing and they teamed up to produce something that would provide a migration path for m68k and i386 software. The PowerPC architecture was based on IBM's POWER architecture but extended to make it easy to emulate m68k and i386 at reasonable speeds. Microsoft was signed up to port Windows NT and it looked like you'd be able to run Windows and MacOS (the two most popular desktop operating systems) and possibly some of the other less-popular ones (most of which were m68k-based) on the same hardware. IBM and Motorola were both going to produce chips, so there was guaranteed to be competition, which would bring down prices, and they were soliciting other companies to produce implementations of the architecture. Within a few years, PowerPC would be faster and cheaper than x86 and would run more software. At least, that was the theory. It sounded quite plausible, but history didn't quite work out like that.

Comment Re:Cost of doing business (Score 2) 91

Those numbers don't tell the whole story. iBooks doesn't exist to make a profit selling books, it exists to make the iPad seem like a plausible platform for reading books. Similarly, Amazon gets a significant benefit from locking people into the Kindle ecosystem. The $180M in cash that Apple gets is nice, but it's nothing compared to having a load of people who have bought books that will only work on an Apple device.

Comment Pairing? (Score 4, Informative) 236

Apple was definitely behind the power, performance curve," said Nathan Brookwood, principal analyst at Insight 64. The PowerPC processor that emerged from that earlier pairing changed that

PowerPC was pushed by the AIM alliance: Apple, IBM, Motorola. The latter two developed and produced chips. Apple had some input. The goal was an ISA that made it easy to emulate both m68k and i386.

Comment Re:Any questions? (Score 2) 59

Yup, it's on GitHub in two repositories, one for LLVM and one for clang. We've been pushing the fixes for MIPS IV upstream, but there are some changes to the mid-level optimisers to make them aware that not all pointers are integers and some extensions to the platform-independent code generators for the same.

We've upstreamed all of the FreeBSD changes required for the base processor (BERI) and the development boards, so FreeBSD 10 will run out of the box on CHERI (it just won't expose any of the capability features). The CHERI-enabled version of FreeBSD is also on GitHub.

The code for the processor is just in a tarball at the moment. We're going to move it to some sensible public revision control system once we've worked out how much of our internal svn history wants to be included in the public release.

Comment Re:Any questions? (Score 1) 59

This is an interesting design. Have you thought about maybe posting seL4 to it once that's open-sourced in a couple of weeks? /akr

Yes, we're looking forward to the seL4 release. Somewhat cautiously, as there's no mention of a license (if it's GPL'd, we probably won't put any effort into it). In CHERI, we have store-capability and load-capability permissions on both capabilities and pages. To implement the seL4 model (where capabilities are stored in special pages), we'd only need to use the TLB-grandularity protections, but it would be more interesting to provide fine-grained capability storage, which would reduce a bit of the difficulty in programming for seL4.

We're also interested in the impact on the proofs in seL4. For example, seL4 currently assumes that the TLB is correct as an axiom (read the errata sheet for any production CPU to see how valid that is). With CHERI, we have some proofs extending down into the ISA and into the implementation and it would be interesting to see how these could be coupled to have a proven-secure systems. The folks at UT Austin and Centaur are (independently of us, but we talk to them periodically) working hard on proving that properties of higher-level HDLs are mapped correctly to gate layouts, so in a few years it may be possible to have a microkernel with security properties proven correct right down to the gate level.

Ilya Bakulin is currently working on porting FreeBSD to run atop L4 and is interested in extending this port to run on seL4. That would also be an interesting approach when combined with CHERI, allowing a full FreeBSD to run with some critical services moved out and into a tiny TCB.

Comment Re:Any questions? (Score 1) 59

We haven't specifically looked at key storage, but we are looking at potential ways of extending the approach to heterogeneous multicore systems, so that access to main memory could be delegated to accelerators (at varying levels of coupling) via capabilities and capabilities could be used to mediate access to accelerators. In this scheme, it would be possible to provide an encryption coprocessor that would store keys internally and perform encryption and decryption operations on blocks of memory delegated to it from userspace.

This is part of a more general problem, which is that most accelerator designs currently follow the model of a device, which requires kernel mediation to use and don't really support virtualisation well. The design you want is a resource that's cheap to access from userspace and easy to multiplex. Once you have that, it's easy to have useful crypto coprocessors (i.e. ones that cause a speedup for everything, rather than a slowdown for anything smaller than a few tens of KBs).

Comment Re:Laser cutting directions! (Score 1) 59

A lot of routers actually run FreeBSD/MIPS. The FreeBSD MIPS port was jointly done by Juniper and Cisco. The CHERI project is jointly funded by two DARPA programs, CRASH and MRC. The MRC-focussed part is looking as software-defined networking and switch fabrics. Part of this includes putting CHERI on the NetFPGA 10G boards (which have 4 10GigE ports, so can do a reasonable amount of packet pushing). For a switch, you typically want some hardware acceleration of lookup tables for routing and so on, but CHERI might make sense for isolating flows from each other. We'll see over the next year...

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