Comment Re:What's with the clock rate masturbation? (Score 1) 42
Higher clocks isn't actually a desired feature, it's what you have to do if the bus is too narrow and you're too cheap do make it wider. If they could afford it, they'd definitely pick a wider bus before higher clocks (and therefore more energy consumption).
It's not always cost that limits bus widths. See PCI for example. They tried widening it (64 bit) and clocking it up (66, 133, and very rarely even beyond), but what won out is a much higher clocked serial interface (PCI Express).
Skew in a parallel interface is a bitch, plus the number of traces required on the board to support a wide bus. There's only so many connections you can practically run in to any given chip package without getting unmanageable.