Moore's Law Staying Strong Through 30nm 199
jeffsenter writes "The NYTimes has the story on IBM with JSR Micro advancing photolithograhy research to allow 30nm chips. Good news for Intel, AMD, Moore's Law and overclockers. The IBM researchers' technology advance allows for the same deep ultraviolet rays used to make chips today to be used at 30nm. Intel's newest CPUs are manufactured at 65nm and present technology tapped out soon after that. This buys Moore's Law a few more years."
on the BUSS (Score:5, Interesting)
What's the minium then? (Score:4, Interesting)
Why Good news for Intel? (Score:1, Interesting)
IBM invented this, so IBM should be able to use it more than Intel ever can. I will note that Apple left IBM/Freescale to goto Intel but there are more than just processors reasons why they left. Apple did not from the looks of it feel that IBM was going in the right direction though IBM is going to be better off without Apple involved because Apple has ego issues.
Overclocking? Really? (Score:1, Interesting)
Punctuated Equilibrium - Phase Transition in Moore (Score:5, Interesting)
I believe that the chip industry will have to shift paradigms as the limit of a technology approaches and during these shifts there will be a period of relative nonimprovement as new techniques are refined, implemented, and large scale facilities are built.
There's so many promising technologies on the horizon (photonic computing, three dimensional "chips," quantum computation) etc, but the transition to each will be very bumpy, not at all smooth like the last 40 years of refining two-dimensional semiconductors.
As times change, what we know as Moore's law will change with it. It's likely that the "average" improvement will continue to follow the law more or less (considering that it is driven more heavily by economics than technology). Computers will continue to get faster, cheaper, and able to do things we wouldn't have thought we needed to do before.
Re:What's the minimum then? (Score:5, Interesting)
While the smallest chunk of silicon we could lay down would be one atom of it, there are things far smaller. In fact you can go something like 26 more levels of magnitude smaller before you start reaching the feasable limit of measurable existance. And yes, subatomic particles could theoretically be used in processors.
The process designation refers to the the distance between the source and drain in the FETs (transistors) on a processor. Keep in mind that this distance is by no means the smallest thing in the processor - the actual gate oxide layer is tiny by comparison, with Intel's 65nm process having only 1.2nm of the stuff. That's less than 11 atoms thick.
Found this on a thread at bit-tech.net forums. [bit-tech.net]
Well, NO. (Score:2, Interesting)
There's several large cans of whup-ass that have to be overcome before you can make IC's that much smaller:
And the programmers will just soak up all your extra speed by turning up the "ooooh" factor (See: Vista).
Re:Punctuated Equilibrium - Phase Transition in Mo (Score:5, Interesting)
There are many important algorithmic problems that are inherently serial. Some things are mathematically impossible to parallelize. Also limitations caused by enforcing cache coherency, communications interconnects, and resource access synchronization/serialization create bottlenecks in parallel systems. The astrophysics simulation code that I paralellized is almost entirely math operations on large arrays (PDE solving), however there are diminishing returns past 48 processors due to communications latency. Better programming techniques can push the limit of this, however it is difficult to design software that mitigates the effects of this kind of latency without many man-hours spent to handle it.
Then, far off over the horizon, there's the possibility of quantum computing, which would make for a rediculously huge surge in processing power all at once.
I mentioned this in my post, however there is a bit of a catch. Quantum computing, practically speaking, is only useful for certain problems - problems that are "embarassingly parallel." QC does not help with fundamentally serial problems, and is likely to be impractical beyond a critical number of qubits, due to quantum incoherency, even quantum error correction can only stretch so far. Great for cryptography/number theoretic operations, and probably many optimization problems (scheduling perhaps?) but certainly not for standard computation. Problems (like database queries) that require large amounts of data to be stored in a quantum coherent fashion are unlikely to be practical.
"That's fundamentally how Moore's Law works: as soon as the current paradigm starts to get maxed out, we simply shift to another paradigm."
Ahh, but that's just it - there is a cost to the switch in terms of both time and money. What I am saying is that yes, we can continue to change paradigms whenever we hit a limit, however these transitions will be very expensive and will cause "delays" during which little improvment on shipping computer technology will be seen.
Moore's law is universal, not empirical (Score:2, Interesting)
Re:I've heard that one before... (Score:4, Interesting)
Sure, its not a law. But...
I'm not sure that it is so clear that the limit will truly be reached before a processor capable of performing as if it had a transistor for every atom of the earth is created. Assuming we're still around, I believe we'll be able to maintain the increases in speed and scale predicted by Moore's law through means we can only just imagine now.
Certainly, it is starting to appear that we'll see combinations of quantum and other processing. There was also recently a development in tri-state per bit quantum storage that may be extendable to n-state per bit. Perhaps we'll find ways to put subatomic particles together into things other than atoms that don't even require atoms as a trapping mechanism and be able to fully exploit that scale. We could explore processing in ways where a single "transistor" or whatever happens to be the smallest scale component participates in different ways in multiple operations or memories like neurons already do. Technologies for processing that don't generate anywhere near as much waste heat are appearing (magnetic for instance) thus allowing the full exploitation of the third dimension to look more plausible without hitting heat dissapation barriers (solid cubes instead of layered wafers). And what about other dimensions? At the atomic scales we're reaching, it is much more believable that we'll eventually be able to exploit some physical phenomenon to put some of the processing or storage mechanisms into non-temporospatial dimensions.
Anyway, I believe it to be very unimaginative to say that Moore's Law will ever hit a barrier. I would call it a virtual law. Sure, its not a "law" as in a law of physics. It isn't a theory either. Rather, its a good guess at a rate of development that we can sustain.
I personally believe that the law is going to change in a few more years as computers reach a level of sophistication necessary to directly participate in more of the scientific research necessary to bootstrap the next generation, gradually eliminating the man in the loop unless we find ways to start scaling the brain's capabilities. At that point, we may start to see the 18 months per generation become one of the variables of the law that is scaling down toward 0.
Re:I've heard that one before... (Score:3, Interesting)
Re:What's the minimum then? (Score:3, Interesting)
The Electrons in your transistors are "blurry". When the walls of their potential wells (i.e. the width of the wires) get to low, they will start to tunnel between them in a number that is inacceptable for the operation of a logical circuit. Note that tunneling probability is proportional to something like e to minus the potential well height, so there is no critical limit, rather a smooth transition from "no problem" to "show-stopper".
So the real question here, which is left to the audience, is at what width do we get a real problem with tunneling currents. (I assume that on contemporary CPUs, the effect is already measurable, yet correctable).
Re:Why small? (Score:5, Interesting)
1) Defects and Yield. Most processors are manufactuered out of silicon wafers 300 mm in diameter. The wafer is very pure silicon (before they start doping it), and the crystal structure is one of the most perfect and regular that humankind has ever been able to produce (at least on a large scale). The industry doesn't do this merely to be perfectionist - it costs a LOT of money and infrastructure to do it - but simply because defects in the crystal structure and silicon purity result in a non-functional chips. The statistics and probabilities behind how many defects get scattered on a wafer, and how many potentially useful chips do those defects knock out has been heavily studied by the industry. The yield that one gets from a single wafer that has many chips on it is a function of defect density and chip size (and other things). A larger chip naturally has a greater chance of having a defect than a smaller chip. There isn't much more that the industry can do to reduce the number of defects on a wafer. In order to increase yield, one of the things the industry banks on is decreasing the chip size. The yield for, say, op-amps (which are very tiny chips) is much higher than for full-blown processors.
2) Signal Distance. The upper limit of speed for an electronic signal in a chip is the speed of light. That's really fast, but not infinite. In fact, compared to the clock speed of the chip itself, the speed of light becomes significant. The speed of light in a vaccum is 3 * 10^8 m/s. In one nanosecond, light travels 30 cm. For a 4 GHz processor, light can travel only 7.5 cm between clock cycles. In truth, the electronic signals in the chip travel slower than that. So, the distance between various parts of the chip become significant. For a chip as large as several inches, it can take quite a long time, many clock cycles, for bits to make it from one end to the other. Wasted clock cycles = reduced performance. So, in order to continue increasing performance, the industry has worked very hard to keep the size of processor chip very small, so that it takes very little time for signals to travel across it.
3) Power. It would take a while to explain the physical reasons behind it (see an VLSI or semiconductor textbook for a full analysis), but the operating voltage of a transistor goes down as its physical size goes down. It used to be that 5 V was the working voltage of most all transistors. Then it moved to 3.3 V. Nowadays, the core voltage of most processors is around 1 V. As the operating voltage has decreased, so too has the power dissipation per transistor. The deceasing feature size of transistors and photolithographic techniques is largely to thank for this. The reason that processors now dissipate such a large amount of heat is that, even though the per transistor power has decreased, the number of transistors in the chip has increased more rapidly. If one tried to make a P4 chip using 350 nm techniques (which used to be the standard feature size les than a decade ago), the chip probably would dissipate many hundreds of Watts.
4) Speed. One would again have to check out a VLSI textbook for a full explanation, but (physically) smaller transistors can switch states faster than large ones. While clock speed is far from the be-all, end-all measure of processor performance, it is generally true that faster transistors result in faster performance (hence the whole notion of overclocking). Using the szame "P4 made using 350 nm technology" example, it would be impossible to run such a chip at anything close to 4 GHz. In fact, I doubt you'd be able to get it to run at even 1 GHz - the transistors would simply be too slow. I don't recall exactly when 350 nm was the standard technology used by the industry, but I imagine that you'd find it coincided roughly to the times when chip speeds were mea