Thanks for your substantial reply, as well as the link to the Alpha Architecture Handbook. I'll look into it.

Although I'm not a hardware designer, myself, I've co-authored the extASM ARM assembler, currently being updated to ARMv7. The assembler is itself written in ARM assembly, about 20,000 lines of it, so I've got quite a bit of experience with writing ARM code. :)

I understand what you mean about the shifter and the page tables, now.

As you allude to, the designers of the ARM weren't stupid when they made this design, but as it often is, what may have been an advantage (or an efficient design) at one time, may turn into a disadvantage (or contributing to less efficiency) later, as the field evolves.

One such thing I was recently made aware of is the SWI (system call) instruction. At the time, it was a reasonable design: Encode the system call number in the instruction (thereby saving a move instruction before the call). At the time, there were no instruction/data caches. However, with today's separate instruction/data caches, using the SWI instruction leads to "polluting" the data cache, as it needs to read the instruction (thus fill a data cache line) to find out the system call number.

Also, historical reasons and market factors may contribute to making a design that was once simple and clean/elegant, become rather more complex and loose some of its elegance. In the ARM's case, it has become rather a lot more complex (I know that all too well, having to implement all of its instructions in extASM... :) ), but that has also made it more powerful (such as the addition of long multiply, SIMD, and floating point support).

Regards,

Terje

Could you have expanded on these two statements? What's "crazy" about its page table format?

As for the ability to shift the address offset of a load/store, what's the problem with that? x86 has the same, except that their shifts are limited to a few places (at least it used to be that way).

I don't know much about the Alpha, as it's been hard to find an assembly reference online, but some of what I think makes the ARM design elegant is:

- Three-register architecture, where you may operate on two registers, and store the result in a third.
- Conditional execution of all instructions (not for some of the new classes of instructions, such as the SIMD instructions, though).
- Optional PSR updating.
- Optional shifting of one of the operands by a constant, or a fourth register.

The combination of features like this makes for very elegant, powerful, and compact code.

The question is, can the Alpha do things like this?

I think you'll find that what is considered the most "elegant" and "best" processor tends to be highly subjective...

Furthermore, describing design choices as "crazy" doesn't sound very objective or balanced...

Regards,

Terje