We use Verilog, and I recommend it. (Score 1)

At the university I teach at (Michigan Tech), we have selected Verilog design for our Altera FPGAs, and have been using it for 5+ years. I used Verilog in private industry before I started teaching and it *seemed* to be more common at that time. When I did some time at IBM back around 1998, they were using VHDL. One of the companies that hires a lot of our grads uses VHDL, and I keep having to tell students, "Look, if you know Verilog, all you need to get a handle on is the syntax of VHDL. Tell them that!"

Knowing both, I find students struggle enough with the concepts of logic design and simulation when they have a familiar kind of syntax (the C-based syntax of Verilog), let alone adding the complexity of VHDL's strange ADA-based syntax. I suggest Verilog.