One problem is that a lot of FPGA hackers write their functionality in Verilog or VHDL. Those provide a fairly high level syntax that makes it easy enough to design the hardware. The original chips, however, were designed using schematics.
I'd like to elaborate on this one: if you're using an FPGA to begin with, you don't really have the choice of using anything lower-level. First, the FPGA equivalents of machine language and compilers are usually closed systems, so Verilog and VHDL are often all you can do.
Second, the FPGA hardware itself is not infinitely malleable. You have a limited set of circuit elements and interconnects, and this coarseness is also a limiting factor on clock speeds. When implementing something new, decent hackers will use the FPGA quirks to their advantage, instead of trying to ape the features of hand-drawn circuits. This is of course a problem if you're trying to emulate a given piece of hardware exactly. OTOH, in the case of NES and its few MHz, you can probably make up for it in raw speed and software-like solutions.
FPGA design isn't a magic wand that just makes emulation perfect. You still need to figure out how the chips work internally.
Yes, the FPGA chips in particular.