Comment Re:Double standards (Score 1) 55
Clock propagation has been a known issue in semiconductor at least since the late 90's when I was studying semiconductor design (yeah I'm date myself). I really should see what techniques that they've come up with since then. Back then they were saying we were reaching the end of Moores Law due to feature size, but they kept kept finding new ways to decrease feature size that previously was thought of as "not possible" due to physics.... and today we've got EUV, and phase-shift pattern masks coming.
So not much has actually been done since then. The only major changes (there are many small incremental changes) that looks new are dynamic frequency changes and being able to selectively stop propagating the clock to save power in shutdown regions of the chip. Since the clock can be as much as 30% of the chip's power consumption, being able to shut it down dynamically really can save some power.
There does appear to be some research in an attempt to improve everything "Novel structures are currently under development.... Important areas of research include resonant clocking techniques, on-chip optical interconnect, and local synchronization methodologies..."
So not much has actually been done since then. The only major changes (there are many small incremental changes) that looks new are dynamic frequency changes and being able to selectively stop propagating the clock to save power in shutdown regions of the chip. Since the clock can be as much as 30% of the chip's power consumption, being able to shut it down dynamically really can save some power.
There does appear to be some research in an attempt to improve everything "Novel structures are currently under development.... Important areas of research include resonant clocking techniques, on-chip optical interconnect, and local synchronization methodologies..."