Submission + - Libre-SOC fully Libre/Open Hardware 180nm OpenPOWER ASIC submitted to IMEC MPW (openpowerfoundation.org) 1
lkcl writes: Libre-SOC's NLnet-funded entirely Libre 180nm ASIC, which can be replicated down to symbolic level GDS-II with no NDAs of any kind, has been submitted to IMEC for fabrication. It is the first wholly-independent Power ISA ASIC outside of IBM to go Silicon in 12 years. Microwatt went to Skywater 130nm in March however it is also developed by IBM, as an exceptionally well-made Reference Design, which Libre-SOC used for verification.
Whilst it would seem that Libre-SOC is jumping on the chip shortage innovation bandwagon, it has actually been in development for over 3 and a half years so far: it even pre-dates the OpenLane initiative, and has the same objectives: full automated HDL to GDS-II, full transparency and auditability with Libre VLSI tools Coriolis2 and Libre Cell Libraries from Chips4Makers.
With EUR 400,000 in funding from NLnet and an application to NGI Pointer under consideration, the next steps are to continue development of Draft Cray-style Vectors (SVP64) to the already Supercomputer-level Power ISA, under the watchful eye of the upcoming OpenPOWER ISA Workgroup.
Whilst it would seem that Libre-SOC is jumping on the chip shortage innovation bandwagon, it has actually been in development for over 3 and a half years so far: it even pre-dates the OpenLane initiative, and has the same objectives: full automated HDL to GDS-II, full transparency and auditability with Libre VLSI tools Coriolis2 and Libre Cell Libraries from Chips4Makers.
With EUR 400,000 in funding from NLnet and an application to NGI Pointer under consideration, the next steps are to continue development of Draft Cray-style Vectors (SVP64) to the already Supercomputer-level Power ISA, under the watchful eye of the upcoming OpenPOWER ISA Workgroup.
Yay! (Score:1)