We've long passed the point where automation tools can place and route an entire chip all at once (flat). Out of necessity designs have to be carved up into separate hierarchical blocks that can be worked on separately. As far as I know, that type of partitioning is typically something done manually along logical design boundaries.
Just a WAG here, but I would think that at least a component of this "AI" must be the ability for it to make "intelligent" choices about breaking up the design into hierarchical blocks that better reflect the physical, rather than the logical, connectedness of the design elements.