A couple of points to address (Score 2)

I would just like to quickly address a couple of these points that have come up in the previous posts: I would first acknowledge and concede that the current LOGi-Board offerings are not the latest, fastest, sexiest, FPGA boards on the market. There are a great deal of offerings and all having their respective strong points. The LOGi-Boards do not attest to competing with the latest SOC offerings with quad-core ARM A9 processors on-chip. The LOGi-Boards reveal themselves to the world in a humble Sparatan 6 TQFP manner. But, because LOGi is not fastest sprinter on the field, we believe that they have their place, right at the easy to use entry point to using FPGA with ARM. The current LOGi-Board offerings are our entry level with what we found to be the most cost effective per performance entry into the market. With the success of the current offering we hope to begin addressing the Camaro, high horse power offerings in the future! The point of the LOGi boards is to eliminate the time consuming, error prone procedure of creating a discrete, “perf” board, or other unreliable interface to the ARM platform. How long will this process take, what are the chances of getting the connections wrong, how well will it hold together if you decide you want to use in a project for long term usage. Do you have drivers to and API to quickly interface between the FPGA and CPU? If not do you have the skills to write your own interface drivers or API? How long will this take and how many hairs will you lose in trying to make things work? Based on on a previous post of a presumed experience HDL/Embedded user on this thread this is what you might expect “I've spent the better part of the past 3 weeks just figuring everything out on my own.” (See Re:ZedBoard, SoCKIT thread). 1) “Teach coders to be logic designers”. We make no such assertion of making coders logic designers, rather wish make FPGA’s reasonably accessible and workable from a coders perspective. I believe there is a vast contrast between being a “coder” and “logic designer” and we simply want to allow the coder to understand and be able to work with the grass on the other side of the fence. For those do not wish to learn HDL or deal with any “logic design”, we make a usable product for them as well with the LOGi-Apps. Simply download the latest pre-configured application and have it running with any of the above mentioned issues. 2) “Make it easier to learn the FPGA toolchain”. I am not sure where we made the claim of making it easier, but we do eliminate the need to use the toolchain completely if the user wishes. See previously mentioned LOGi-Apps. We do supply all of the existing wrappers and interfaces to make HDL development with said toolchain’s a greatly expedited procedure though. 3) “Enable anybody to do something they couldn't just as easily and affordably do before”. Our current offering may not be perfect, but have hope and goals of making things a little easier for those who may not have been very welcomed to the wide world of FPGA previously. If we are not there yet, well, I would say we are just getting started and will be there shortly! Happy FPGA/CPU to all!