Re:Memory bandwidth? (Score 2, Interesting)

3D integration schemes, which IBM and Intel are both pursuing, help deal with this problem. As you noted, you can't put enough pins on a chip with traditional packaging to achieve a sufficient memory bandwidth. But with 3D integration, the memory chips are connected directly to the CPUs with "through-chip vias". You can have tens of thousands of these vias, and as a bonus, the distance to the memory is extremely short, so latency is reduced.

- Trevor -
[[self-construction]]: The autotherapeutic diary of a crazy geek's journey back to mental health