I believe engineers solved this problem here: https://www.smbc-comics.com/comic/2010-05-12/

Deja Vista -> Leave Vista (spanish trans.)

I opened mine by: pushing the paper cover off, using my house keys to rip the two pieces of tape, sliding off the box top, and unwrapping the plastic.

In all in took 15 seconds sitting on the couch. Though I could have done it in under 10 if I was at my desk with my hobby knife.

I don't get it, how can people be that stupid? Is it really that hard? Have they lost all hand coordination by using touch screens instead of regular keyboards for far too long? I'm serious, I'm not trying to be funny, but I just don't get how you can have a hard time opening a box like that.

Thinkpad T400 with extended warranty + Ubuntu LTS. Or X series if you want something a little lighter. Everything works "out of the box" after installing Ubuntu with the possible exception of the fingerprint reader (you may have to apt-get that after install).

All pro audio equipment is powered with AA. Shure, Sennheiser, AT, etc. all use AA in their professional series devices.

Charlie Rose did an interview with the head executive producer of SyFy (sorry, I forgot her name). He specifically asked her about the wrestling on SciFi (as it was called then). Supposedly, she used to be the head exec of USA (another NBC cable property) and absolutely loved the 'drama' and fantasy involved in wrestling. So when she went to SciFi she thought it would be a good fit. It had nothing to do with your at least reasonable explanation.

That the head of SciFi thought wrestling fit perfectly with the other shows, or at least her vision for SciFi, pretty much explains the overall level of programming on that channel.

Always try to talk to profs in your school in person. It's fairly easy to setup a meeting or just catch after class (even if it's a class you don't attend). If they are busy after class, they will almost always recommend a meeting time within a few days.

If you are willing to meet with a prof at a different school than you go to, then that usually means a lot to them. For example, if you go to UCSD and a prof at USC wants to talk to you in person then it's probably a very good idea to meet. If they are young (assistant or associate prof) then Skype works too for cross-country meetings. Profs can blow off emails easily and to a degree telephone calls, but in person almost guarantees good results.

While hunting for grad schools, I was offered a face-to-face meeting from Western Europe. When they found out I was in North America a Skype meeting was perfectly satisfactory even with the most senior of professors.

Disclaimer: I am a current PhD grad in EE. Your field might be different, YMMV, etc.

Many people on this site will say research the latest papers or even insult you for asking a question regarding the best way to find a research mentor. Sorry about that, grad students can be ... curt at times. I'll try to answer your questions and provide some insight.

"Is this a common problem across all fields? Is there some ... this need?"

Sadly, this seems to be a problem in EE too (though I can't say much about other fields). The main reason for this problem is human laziness. Once a student goes through all the trouble to find a decent grad program to enroll to, there seems little reason to document this one-time affair. When I was in a similar situation as yours, I too thought of making a wiki type site where all my experience could be indexed and searchable by other students. However, I quickly became aware that this is pointless. First, PhD research tends to be VERY VERY specific so information useful for me has little value to others. Second, field specific information changes very rapidly so any program catalog would need constant updates or become useless in a matter of months. Third, people are lazy. Once you do through the process of choosing a program you have very little incentive to stream-line it. You will almost likely never encounter the problem again ... so why optimize.

But all is not lost, here are a few tips:

1. Don't listen to people telling you to read the all the latest research in your field. You will likely not understand it. That's not meant as an insult at all. While you might know the field you are interested (clinical psychology) you likely don't know any of the specific terms to do a thorough analysis. It would be like me telling a 3rd year EE undergrad interested in signals that they should read an IEEE transaction journal on motion compensated temporal filter DWT lifting algorithm, and somehow be able to understand it and contact the author regarding their research. It's unrealistic and probably does more harm than good (you might get depressed at how little you actually know).

If you are to read anything, read a light survey paper about clinical psychology to get acquianted with the terms. Then search for schools that do that. I.e. if pre-natal clinical psychology interests you (I have no idea if that's an actual field) then maybe UCLA does good work in it.

2. Talk. Perhaps your best source of information is a professor in your current school. Ask him/her what schools they would recommend for PhD work. You might be surprised at the answer, often they will recommend other schools and be able to tell you the good/bad. Also, be sure to ask what school they went to (it's usually on the department website anyways). Just make sure to ask more than a single professor's opinion, you don't want to be prejudiced by one guy's pet research project or arch-nemesis grant competitor (yeah, sadly some profs are like that).

3. Once you find a good school, check the department website and find a professor who does interesting work. Just call him and ask him about his research (professors ALWAYS like to talk about their research ... unlike some grads). Chances are you won't understand 90% of what the guy says, but you will get somewhat of a feel whether you can work with him for the next 2-3 years. Go ahead and call all profs in that research area ... you will learn just by talking over the phone who is reasonable and intelligent and who might be just a tad crazy.

Which brings me to the most important part ... make sure you find a mentor you can work with for at least 2-3 years. There is no point in trying to work with a genius if he's a jerk ... you won't get anywhere and your research (if any) will suffer. And if you don't find that one star research mentor, that's okay too (maybe he is still doing his postdoc). Just find a school where the faculty in your area does good work and the majority of the professors are people that you would highly consider working with, your prospective research mentor would 'gravitate' that way anways.

That said, once you start grad school, you will have a couple of years to weed out a good mentor while you do fundamental grad classes.

I bought my Acer Aspire One for $350 from Best Buy on the first day it came out. My cousin bought her's for $250 at newegg on Thanksgiving. Where did you get $420 from?

I was in a public school for 8 hours a day from K-12 grades. Your socially stinted home-schooled life sounds slightly better than my socially stinted public school life. I don't think it was your environment ... probably just your personality.

Go here: http://www.digilentinc.com

Buy the Nexy2 board for about $70. It has: 8-bit vga, 1 serial p., 8-seg disp., some flash mem., and a bunch of switches and leds. Uses Spartan3e chip, and comes with a nice case and USB programming cable. Programming software (adept) only works in Win., but you can get a linux programmer if needed. The Xilinx ISE or EDK stuff works in either windows or linux. Bonus: gvim works as an editor in ISE :)

It basically comes with everything you need and should keep you occupied for several months; it's what we use at my university to introduce students to FPGAs in the lab. Feel free to contact me for more info.

Before going any further, I will admit my bias and say that I did teach a class (lab actually) where the final project was to write a two player pong game on an FPGA. I am sorry if you felt that was a waste of your time when you did it (I am assuming that is where your anger is coming from).

That said, saying that no one should ever use FPGAs/CPLDs is pure non-sense. Every engineering problem can be solved multiple ways, and outright excluding FPGAs as a valid method is unwise at best. It's like saying that no one should ever use microcontrollers because full blown desktops have more power anyways.

Do you know how microprocessors are designed? Have you made a MIPS or (gasp) even your own processor? I'll give you a hint, they're not made with a bag of NAND TTLs and wire-wrap. They are designed in VHDL, Verilog, or some other proprietary HDL language, simulated, verified, etc. and fabricated. Sure the first microprocessor was built with individual gates, but that's not how it is done now. Similarly, they aren't made with Java on a JVM.

And yes, I have used both VHDL and Verilog. VHDL is cumbersome with its long admittedly convoluted syntax when you come from a software perspective, and Verilog seems easier because superficially it is "C-like". But they both "make sense and flow" just fine from the perspective of an EE. The reason for-loops and whiles don't exist (*) in because at the hardware level, they don't exist. When someone writes a for-loop in C/Java/(other high level language) it is compiled/assembled into machine code for a microprocessor. The microprocessor itself executes this code with flip/flops and logic gates, that's it. No loops or even logic statements because there is no such equivalent in the hardware world.

Also, as for FPGA/CPLDs not providing a competitive performance to investment ratio (the execution speed up to engineer implementation time), that is also not true. As soon as you take a problem from a procedural domain to a concurrent domain, it is often possible to do more work in a given amount of time. It's partly the same reason why we are seeing Intel/AMD move from increased clock frequencies to increased processing cores (power issues aside). And when you concede that using a concurrent domain is sometimes more useful and decide to create an ASIC in your product, well guess what? If you already designed it on an FPGA you are 90% there (or 99% if you believe the Xilinx/Altera kool-aid).

So to conclude, I wouldn't design a GUI with HDL and I wouldn't design an H.264 cellphone decoder chip in C/Java. I would use the best tool for the job.

* Yes, I know that VHDL for loops are similar to C-macros, and wait statements will work in simulation like a while loop, but neither will work how a C programmer expects them to.

I also have a BS in CompE and an MS in EE, while VHDL is usually taught first not learning Verilog will only handicap you. Since you mention Xilinx FPGA you are no doubt aware that Digilent builds many boards for the academic environment. In many cases, Digilent provides reference examples in Verilog only, especially on their old XUVP2P (sp?) boards. In my lab, I had to teach the students a little bit of Verilog to be able to read the provided reference designs (they only had been taught VHDL in class).

You (not you specifically, but engineers/students in general) soon learn that what is taught in class is not necessarily the most useful or directly applicable method for real-world designs. E.g. finite state machines are taught, but often a design can be done with a counter just as easily.

Xilinx schematic layout is okay for sophmore or beginning undergrad courses, however it is very frustrating to use for anything more complex. Specifically, the custom logic portion where you define your own logic and then "wire it up" to the predefined NAND or NOR gates is poorly thoughtout. Usually when you back and make changes to your custom logic, the schematic capture still uses the old logic (it lacks any real make file capabilities). That said, I have heard the Altera equivalent is much better (though I have never used it). This coming more from a CompE/EE side though.

An FPGA is not a CPU. It is closer to a programmable ASIC (application specific IC).

Unlike a cpu, it doesn't have clock, instruction pointer, accumulator, etc. Sure it COULD have all that but then you would be the one programming that in. In fact there exist several softcore cpus like microblaze, etc.

An FPGA is more like a vast sea (or field) of disconnected NAND NOR gates. When you compile your verilog or vhdl code, the compiler literally 'wires' together these gates. (Actually it uses LUTs that mimic gates but you get the idea).