Besides EUV, there's also the question of actually making working silicon that's tested and working. The process is: make the silicon wafer; test the silicon wafer; package the few that pass testing.
TSMC are the masters, inventing small machines and leading the world. Apple are 2nd with a working 3nm wafer fab line. Samsung have a working 7nm line, I heard they were upgrading to 5nm, but I never heard of product coming out, so they seem stuck there. Intel has a 10nm wafer fab line, but Intel can't get it working. They've rejigged things so their 10nm line is actually putting out 12nm chips but they still lose money trying to make silicon. They make their CPUs on a 14nm line.
Here's China's progress. In 2021, Rockchip released the RK3588 on 8nm Silicon. They have that technology for many years, and I don't doubt they will improve on it. Chip making is extremely seismically sensitive, and barely noticable movement on a seismograph just wrecks stuff. Ditto power surges, lightning, etc.
Smaller fab size = lower power usage at the same frequencies or higher frequency for the same power. But every increment downwards needs complete redesign now. It's not just about making things smaller, because thinner insulation doesn't work.