Comment Trinary consumes more power, not less. (Score 1) 134
One of his claims is that trinary logic is "better" than binary because it uses another "natural" state of electricity: flow forwards, flow off, and flow backwards. He uses example power supplies of +3v, 0, and -3v.
However, this is *no different* than power supplies of 0, +3v, and +6v. Shifting your voltage reference does *not* change the power consumed.
Trinary also does not change your noise margins. Noise margins are a function of the actual circuit, and in an ideal world the noise margins on the high and low sides would be at half the representation voltage. 2.5 volts for 5-volt TTL logic, for example. 1.5 volts for 6-volt trinary logic, for example. See the noise margins decrease? You would have to increase the voltage range to 10 volts to maintain the noise margins. And therefore you would increase the power consumed. And power rises as the *square* of the voltage.
So let's see. Assuming your gates are feeding 1k resistors, binary logic would consume either 0mA (for a 0) or 25mA (for a 1). Assuming uniformly random distribution of bits, each bit would consume an average of 12.5mA.
For trinary, and maintaining the noise margins, a 0 would consume 0mA, a 1 would consume 25mA, and a 2 would consume 100mA. Average of 41.7mA. Since each "trit" conveys 3/2 as much information as a bit, the equivalent power consumption per bit for trinary logic is 27.8mA.
So trinary logic consumes more power per bit than binary logic.
Bummer.
However, this is *no different* than power supplies of 0, +3v, and +6v. Shifting your voltage reference does *not* change the power consumed.
Trinary also does not change your noise margins. Noise margins are a function of the actual circuit, and in an ideal world the noise margins on the high and low sides would be at half the representation voltage. 2.5 volts for 5-volt TTL logic, for example. 1.5 volts for 6-volt trinary logic, for example. See the noise margins decrease? You would have to increase the voltage range to 10 volts to maintain the noise margins. And therefore you would increase the power consumed. And power rises as the *square* of the voltage.
So let's see. Assuming your gates are feeding 1k resistors, binary logic would consume either 0mA (for a 0) or 25mA (for a 1). Assuming uniformly random distribution of bits, each bit would consume an average of 12.5mA.
For trinary, and maintaining the noise margins, a 0 would consume 0mA, a 1 would consume 25mA, and a 2 would consume 100mA. Average of 41.7mA. Since each "trit" conveys 3/2 as much information as a bit, the equivalent power consumption per bit for trinary logic is 27.8mA.
So trinary logic consumes more power per bit than binary logic.
Bummer.
