I'm not seeking to prove a claim. It's just the way things are.
Accordingly a CPU with a real Huffman coded instruction set might be even better.
The additional cost of caching, decoding and branching with bit-aligned variable-length instructions would outweigh any benefit from reduced instruction fetch bandwidth. It would take more gates and more energy, which is why nobody does it. Talk to the people at Intel and ARM who know about this sort of thing, or look at the trends in instruction set design for high-performance CPUs and ask yourself why none of them have gone in this direction.
The exception to this is situations where code space is very tight or memory bandwidth is very low, which is true is some embedded environments but not in high performance systems.
I don't need to presume, I know that they removed some complex instructions because they made the hardware more complex and reduced performance.
Which contradicts the evidence of the vast majority of CPUs ever made, which is they get faster as you throw more gates at them.
More gates only make CPUs faster if they are doing useful work. Wasting gates on complex decode or complex instruction semantics reduces performance.