Comment Re:Raspberry Pi SBC with ARM and RISC-V cores (Score 1) 28
The RP2350 is in fact even more exciting/interesting:
The burned-in bootloader is only setting the initial state of each CPU core, they can in fact be individually switched between Arm and RISC-V mode, and yes you can in fact run one of each CPU cores in parallel!
So a fast way to experiment with RISC-V code is leaving a 'monitoring' process on core 0 in ARM mode that watches for new code to be uploaded over USB with small standard libraries, stop core 1, unpack the fresh code to SRAM, restart core 1 again in RISC-V mode.