Did you actually read it? (Score 2)

Where is he making these arguments? Were are you getting this information from?

All I can see is you making claims that the author didn't make. He tries to move the debate to a useful level. If you want to talk about an architecture whose instructions pipeline cleanly, aren't you talking about performance oriented concerns? And if so, why are you unwilling to look at the aftereffects of implementation.

As Ditzel has said, the theory is useful in practice because you end up with a FINAL PRODUCT that is every bit as wieldy as CISC.

Now, you can do what many RISC supports do and try to continually refine what RISC means, but all you are doing there is playing "essentialist" games and missing the point: there's more in common now between so-called RISC and CISC CPUs than anyone ever imagined. If that's the case, then the distinction is hardly worth what marketers and trumpeters on web sites make it out to be.