Last time I _had_ to compile something was almost a decade ago.
I'm a gentoo user, you insensitive clod!
CISC is slower than RISC, even though everything is spelled out in full, because determining what it is you are trying to do becomes more expensive than whatever it is you're doing. To solve this, CISC chip makers went to a hybrid architecture, where you've a RISC base and a CISC layer for anything that would be too slow in pure hardware.
Not every CISC have a RISC base underneath. Don't assume that what intel does is the norm... in fact, intel has done that because its particular need of maintaining backward compatibility with the huge installed base of X86 software.
Brain off-line, please wait.
