Comment This reminds me of (Score 2) 185
the Transputer. It had 4 available hardware connections and the description of the way the different processors communicate is very similar to what is described by the article.
Of course to take maximum effect of this communication speed in general parallel applications, main memory access would have to be improved. I'd guess these things will have huge on-chip caches.
Of course to take maximum effect of this communication speed in general parallel applications, main memory access would have to be improved. I'd guess these things will have huge on-chip caches.
