Alioth's Journal: Finding hardware bugs in the W5100

I think I might have found a hardware bug in the W5100 ethernet chip...

I've started to prototype with something called bus indirect mode. Instead of using the full address/data bus (i.e. treating the W5100 as 32k of memory), the W5100 is now a device on an I/O port, with only A0 and A1 connected to the bus (along with the usual RD and WR and data bus). To select memory locations in the W5100, you send the the MSB of the desired address with A1+A0 = bin. 01, then send the LSB with A1+A0 = bin. 10, then read or write the register or memory location with A1+A0 = bin. 11. In auto increment mode, to read or write successive memory locations, all you need to do is issue another read or write with A1+A0 = 11 for as many bytes as you need to read or write.

To set up the MAC address, IP, netmask and gateway, this all worked fine and dandy - read the MAC from flash memory, and write it to the W5100, then the IP, subnet, gateway in the same way.

However, on reading, it seems like it increments the address pointer any time it pleases. With auto increment turned off, the right values are read back (using the very slow send MSB, LSB, then read a byte method), but with auto increment, bytes are often dropped as if it's incrementing the address pointer when it shouldn't.

Of course, Wiznet support immediately reckoned it would be my code :-) (Actually, most problems usually ARE caused by my code). But I could discount this immediately, as the code is very, very simple (just reading the bytes with the INIR instruction, which just issues as many reads as specified by the b register). I also dug the logic analyzer out, and spent some time carefully poking all the little wires into the prototype, and the logic analyzer dutifully showed that (a) yes bytes were being missed by the W5100, and (b) no, there were no erroneous chip selects to the W5100.

I strongly suspect the W5100 was designed and tested only with microcontrollers in mind for bus indirect mode (i.e. it's the only device on the bus), not with a bus with half a dozen other chatty devices, and therefore, it's susceptible to incrementing the address pointer whenever A0+A1 = binary 11 regardless of the state of the CS line.

Well, we'll see what Wiznet support says tomorrow morning :-)

Do keek us posted!

[anominous]

Once again, I'm in awe of your skills! - - I would personally be convinced that it was something I'd messed up - not the OEM!!

Rob