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Interestingly, Centaur is abandonning its unipipe solution for its second generation Winchips, using 2 6-stage pipelines at up to 300Mhz. A third 12-stage pipe line architecture is planned, which will running at frequencies between 400 and 600Mhz, should improve performance by 80%. Centaur is also jumping onto the integration bandwagon, proposing its Winchip 2+NB which reduces board area (and costs) by combining the C6 core and a north-bridge on the same die.
AMD has released its K6-2, at a higher price, and with little OEM interest. However this chip is a screamer, profiting from being the first to use the new 100Mhz front side bus, and the new 3DNow! instructions. Centaur, Cyrix, and IBM also plan to deliver these features in their upcoming processors.
Finally, IBM has released a PR333 version of the Cyrix-designed 6x86 MX, which apparently partially gains its speed from a new type of chip-package. This comes as IBM revealed that it expects its Slot1 solution to be developed by Cyrix.