Average Ratings 0 Ratings
Average Ratings 0 Ratings
Description
ModelSim effectively simulates behavioral, RTL, and gate-level code, enhancing both design quality and debugging productivity through its platform-independent compilation. Its unique single kernel simulator technology allows for the seamless integration of VHDL and Verilog within a single design framework. This HDL simulator offers an unparalleled range of verification features at a competitive price, making it particularly suitable for the verification of small to medium-sized FPGA designs, especially those that are complex and mission-critical. ModelSim’s sophisticated code coverage tools yield essential metrics that aid in systematic verification processes. Additionally, its user-friendly design minimizes the obstacles to utilizing verification resources efficiently. All coverage data is securely stored in the highly efficient UCDB database, providing flexibility in how results can be accessed. Coverage outcomes can be analyzed interactively, either during or after simulation, including after merging results from multiple simulation sessions. This unified and easy-to-navigate environment equips FPGA designers with the necessary advanced tools for effective debugging and refinement of their projects.
Description
Our advanced web platform significantly enhances the productivity of chip developers and verification engineers, allowing them to design and troubleshoot at a pace ten times quicker than before. With Verilator, users can effortlessly initiate and execute thousands of tests simultaneously with just one click. It also facilitates the easy sharing of test outcomes and waveforms within the organization, allows for tagging colleagues on specific signals, and provides robust tracking of test and regression failures. By utilizing Verilator to create Dockerized simulation binaries, we efficiently distribute test executions across our computing cluster, after which we gather the results and log files and have the option to rerun any tests that failed to produce waveforms. The incorporation of Docker ensures that the test executions are both consistent and reproducible. SiLogy ultimately boosts the efficiency of chip developers by shortening the time required for design and debugging processes. Prior to the advent of SiLogy, the leading method for diagnosing a failing test entailed manually copying lines from log files, analyzing waveforms on personal machines, or rerunning simulations that could take an inordinate amount of time, often spanning several days. Now, with our platform, engineers can focus more on innovation rather than being bogged down by cumbersome debugging processes.
API Access
Has API
No
API Access
Has API
No
Integrations
Docker
No
GitHub
No
Siemens Precision
Yes
SystemC
Yes
Xilinx
Yes
Integrations
Docker
Yes
GitHub
Yes
Siemens Precision
No
SystemC
No
Xilinx
No
Pricing Details
No price information available.
Free Trial
No
Free Version
No
Pricing Details
No price information available.
Free Trial
No
Free Version
No
Deployment
Web-Based
No
On-Premises
No
iPhone App
No
iPad App
No
Android App
No
Windows
Yes
Mac
No
Linux
Yes
Chromebook
No
Deployment
Web-Based
Yes
On-Premises
No
iPhone App
No
iPad App
No
Android App
No
Windows
No
Mac
No
Linux
No
Chromebook
No
Customer Support
Business Hours
Yes
Live Rep (24/7)
Yes
Online Support
Yes
Customer Support
Business Hours
No
Live Rep (24/7)
No
Online Support
Yes
Types of Training
Training Docs
Yes
Webinars
Yes
Live Training (Online)
No
In Person
Yes
Types of Training
Training Docs
No
Webinars
No
Live Training (Online)
Yes
In Person
No
Vendor Details
Company Name
Siemens
Country
United States
Website
eda.sw.siemens.com/en-US/ic/modelsim/
Vendor Details
Company Name
SiLogy
Founded
2023
Country
United States
Website
silogy.io
Product Features
Product Features
PCB Design
3D Visualization
No
Autorouting
No
Collaboration Tools
No
Component Library
No
Design Rule Check
No
Differential Pair Routing
No
Schematic Editor
No