Average Ratings 0 Ratings
Average Ratings 0 Ratings
Description
ModelSim effectively simulates behavioral, RTL, and gate-level code, enhancing both design quality and debugging productivity through its platform-independent compilation. Its unique single kernel simulator technology allows for the seamless integration of VHDL and Verilog within a single design framework. This HDL simulator offers an unparalleled range of verification features at a competitive price, making it particularly suitable for the verification of small to medium-sized FPGA designs, especially those that are complex and mission-critical. ModelSim’s sophisticated code coverage tools yield essential metrics that aid in systematic verification processes. Additionally, its user-friendly design minimizes the obstacles to utilizing verification resources efficiently. All coverage data is securely stored in the highly efficient UCDB database, providing flexibility in how results can be accessed. Coverage outcomes can be analyzed interactively, either during or after simulation, including after merging results from multiple simulation sessions. This unified and easy-to-navigate environment equips FPGA designers with the necessary advanced tools for effective debugging and refinement of their projects.
Description
Advance your approach to RF simulation by focusing on the comprehensive design, analysis, and verification of radio frequency integrated circuits (RFICs). Gain assurance through the use of steady-state and nonlinear solvers for both design and verification processes. The availability of wireless standard libraries expedites the validation of intricate RFICs. Prior to finalizing an RFIC, it is essential to confirm IC specifications through RF simulation. These simulations take into account various factors such as layout parasitics, intricate modulated signals, and digital control circuitry. With PathWave RFIC Design, you can perform simulations in both frequency and time domains, facilitating seamless transitions between your designs and Cadence Virtuoso. Achieve accurate modeling of components on silicon chips, and enhance your designs using optimization techniques like sweeps and load-pull analysis. Integration of RF designs into the Cadence Virtuoso environment is streamlined, while the implementation of Monte Carlo and yield analysis can significantly boost performance. Additionally, debugging is made easier with safe operating area alerts, allowing for immediate utilization of cutting-edge foundry technology to stay at the forefront of innovation. This holistic approach to RFIC design not only improves efficiency but also elevates the overall quality and reliability of the final products.
API Access
Has API
No
API Access
Has API
No
Integrations
Siemens Precision
No
SystemC
No
Xilinx
No
Pricing Details
No price information available.
Free Trial
No
Free Version
No
Pricing Details
No price information available.
Free Trial
Yes
Free Version
No
Deployment
Web-Based
No
On-Premises
No
iPhone App
No
iPad App
No
Android App
No
Windows
Yes
Mac
No
Linux
Yes
Chromebook
No
Deployment
Web-Based
Yes
On-Premises
No
iPhone App
No
iPad App
No
Android App
No
Windows
No
Mac
No
Linux
No
Chromebook
No
Customer Support
Business Hours
Yes
Live Rep (24/7)
Yes
Online Support
Yes
Customer Support
Business Hours
Yes
Live Rep (24/7)
No
Online Support
Yes
Types of Training
Training Docs
Yes
Webinars
Yes
Live Training (Online)
No
In Person
Yes
Types of Training
Training Docs
Yes
Webinars
Yes
Live Training (Online)
No
In Person
Yes
Vendor Details
Company Name
Siemens
Country
United States
Website
eda.sw.siemens.com/en-US/ic/modelsim/
Vendor Details
Company Name
Keysight Technologies
Country
México
Website
www.keysight.com/us/en/products/software/pathwave-design-software/pathwave-rfic-design-software.html
Product Features
Product Features
PCB Design
3D Visualization
No
Autorouting
No
Collaboration Tools
No
Component Library
No
Design Rule Check
No
Differential Pair Routing
No
Schematic Editor
No