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Average Ratings 0 Ratings

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ease
features
design
support

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Write a Review

Description

The Synopsys 3DIC Compiler, which is founded on the premier digital implementation platform in the industry and leverages a unified fusion data model, facilitates a smooth transition to 2.5/3D heterogeneous integration. This comprehensive platform supports analysis-driven feasibility studies, multi-die partitioning, and the selection of foundry technology for both prototyping and floor planning in a single environment. As a result, it promotes effective design implementation that encompasses advanced packaging and die-to-die routing, coupled with golden signoff verification. Additionally, the 3DIC Compiler collaborates with Synopsys 3DSO.ai, the first autonomous AI optimization solution in the market for multi-die designs, enhancing system performance and ensuring quality outcomes regarding thermal integrity, signal integrity, and power network design. Widely embraced by clients, the 3DIC Compiler platform has also received certification from prominent foundries, validating its capabilities in advanced process and packaging technologies. This combination of features positions the 3DIC Compiler as a vital tool for engineers aiming to innovate in the realm of integrated circuit design.

Description

Creating designs at advanced process nodes necessitates a novel approach to place-and-route to handle the growing intricacies involved. Aprisa stands out as a detail-route-focused physical design platform tailored for contemporary SoCs. Operating as a complete RTL2GDSII solution, Aprisa facilitates digital implementation by providing comprehensive synthesis and place-and-route capabilities for both top-level hierarchical designs and block-level executions. Its alignment with signoff tools for STA timing and DRC offers tape-out quality correlation, which minimizes design closure challenges while ensuring peak performance, power efficiency, and area optimization (PPA). With its out-of-the-box performance, Aprisa enables physical designers to streamline each phase of the place-and-route process, accelerating their time-to-market. The unified architecture and shared analysis engines within Aprisa guarantee outstanding timing and DRC correlation throughout implementation stages and with signoff tools, significantly cutting down on the required flow iterations and engineering change orders (ECOs). As a result, this innovative approach ultimately enhances both productivity and design quality in complex projects.

API Access

Has API

API Access

Has API

Screenshots View All

Screenshots View All

Integrations

No details available.

Integrations

No details available.

Pricing Details

No price information available.
Free Trial
Free Version

Pricing Details

No price information available.
Free Trial
Free Version

Deployment

Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook

Deployment

Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook

Customer Support

Business Hours
Live Rep (24/7)
Online Support

Customer Support

Business Hours
Live Rep (24/7)
Online Support

Types of Training

Training Docs
Webinars
Live Training (Online)
In Person

Types of Training

Training Docs
Webinars
Live Training (Online)
In Person

Vendor Details

Company Name

Synopsys

Founded

1986

Country

United States

Website

www.synopsys.com/implementation-and-signoff/3dic-design.html

Vendor Details

Company Name

Siemens

Founded

1847

Country

United States

Website

eda.sw.siemens.com/en-US/ic/aprisa/

Product Features

Product Features

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Alternatives

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