... A tutor for the superior school and university interns.

The programmers will assume the role of the tutor who assings tasks to the interns, the interns being the AI. Sometimes the AI will give back results conmensurate with what a TSU (Tecnico Superior Universitario - University Level Tecnician) student would produce. other times the result will be more aligned with what an engineering student would produce (slightly better)

In both cases, the tutor is the one who doles out tasks, specifying how to do them. And it whould be very irresponsible from the tutor to let loose the interns' code without grading and correcting it first

I think the term "babysit" was chosen to induce rage, as in ragebait

I get no cold offers, or recruiters. But I do get those automated linkedin job offer mails. Applied a couple of times. Entered the proces? Yes. Canonical. Twice. For a couple of Cloud Positions.

Sadly, did not get hired, god knows why

So, yes, LinkedIn still has a little value.

for clean room implementations.

If the AI model was trained using the OG software project that is being replicated, they are screwed.

That should be very easy to see, in the discovery phase just ask for a list of all the software that was used to train the AI model. IS a yes/no answer, if the AI saw the OG software, then there was no clean room, the room was dirty, very, very dirty

Reading that book (or, more exactly, its "Reader's Digest", the book itself I read a long while afterwards) was what made me want to become an Electronics Engineer

One of the most influential books in my life. Perhaps, the most influential one.

GodSpeed Mr. Kidder

A Canadian AI (or a national/multicountry AI) would work as a nice baseline for everyone in the country.

Instead of having hamstrung gratis AI that can be withdrawn at a moments notice, you get fully fledged Gratis AI that depends solely on your country. If then you (or your company) wan to pay for some other AI, so be it.

From a soveringty point of view is cool, as you are not beholden to for profit companies, be them national or foreign.

And please remmeber that AI ius much more than LLMs and other Gen AI. Slef-Driving Cars, Platoon Driving trucks, (semi)Autonomus androids/robots, and context aware industrial machine tools/robots need AI too.

I hope canada is contemplating these cases as well, and not fixated on LLMs

At the end of the acquisition, and even though ATi was the bigger company, it was the ArtFX team xalling the shots post merger

This seems like an acqu-hireM the Astound board wanting a change of leadership team, while also increasing footprint and subscriber count...

Converting BSD system Calls to Windows (or Linux) system calls so that a BSD-X86-64 programs run faster in a virtual environment is a manageable problem. And both PS4 and PS5 are essentialy, at their very core, X86-64 PCs with AMD Graphics running BSD.

Given that Sony takes sometimes years to prot from Playstation to PC, by the Time they would have ported the game, the emulators will be ready anyway.

I mean, even the Weird architecture of the PS3 (Cell Processor) was emulated eventually, and a BSD-> Windows (or Linux) WINE equivalent is orders of magnitude easier than that. So...

Bring it on!

107% agree with you, but: The Big-unn paying distros (in particular Red Hat and Android) do not use LTS kernels as their main kernels (although they give said kernels as options), let alone use CIP kernels (supported for 10 years).

I wish they did, but they do not. Why? I suspect it is more of "when we started development of the next version this was the 1st kernel that had everythig we needed" and less of "Let's NOT use an LTS kernel so that customers depend on us for backporting and patches".

6.12 was selected by the Linux Civin Ifrastructure Platform (CIP) to have a "Super LTS", accepting Limited patches for 10 years.

The fact that G.H-K will support it as LTS for 4 years means more time with "propper" patches and less time the CIP has to do the work with less funding and limited patches.

Many projects (most notably OpenWRT) use only CIP Kernels.

If I were a smallish distro, with limited number of voluntaires, I'd Aim to use CIP kernels in General, and 6.12 in particular, even If the project does not do LTSs.

YMTC does not produce RAM, yet. It will produce RAM in the future, probably in 2027 when the fab you allude to comes online.

They are a very fine purveryor of NAND Flash for storage.

I do not know why it was removed from linux. But the same phenomena happened on Windows. I do not remeber if it was on Vista or 7, but around that timeframe. Which makes me suspect there is a technical reason behind doing it.

I guess it has something to do with 3D-rendered Desktop environments not being able to leverage said functions.

At around PCIe5, the speeds were so big, that Datacenter came first, consumer came (much) latter, and that gulf will only widen. Think of the datacenter as paying the early adoper tax for these technologies.

And by the way, When they released the PCIe 6 spec all those years ago, the PCIe-SIG knew full well that consumer boards with PCIe6 would come at the end of the decade. The president of the PCIe Sig said as much in interviews at the time.

Read TFS. These PCIe 6 SSDs were never designed for consumers. More so, ever since PCIe 6 Spec was Released in 2022~2023, the PCI-SIG knew that it would be datacenter only ontil the latests part of the decade... And clearly communicated that.

The bumps for bonding the controller chip to the PCIe bus take significant silicon area, worth hundreds of logic transistors. The (analog) transistors driving the PCIe pins take silicon area worth hundreds of logic transistors.

Minimizing the ammount of pins dedicated to buses, be it memory in VideoCards or CPUs, or PCIe in expansion cards drives massive savings in chip production.

That's why consumers get 2 channel (4 dimm 128 Bit) memory, while servers get 4 channel (8 Dimm 256bit) Buses. That's why nVIDIA Blackwell for datacenter has a 8192-bit memory bus while nVIDIA blackwell for consumers has 128-512 mem buses...

And that's also why SSDs are going to PCIe Gen 6 x4 instead of PCIE Gen5x8

Also, bear in mind that Mobo standard sizes have phisical limits on the ammount of traces that can be dedicated to PCIe Lines and slots (i.e. mobo space is not infinite), therefore, for serves, It makes sense that as amny as your lanes are as fast as possible

Until the advent of CAMM2 (and the inminent advent of SO-CAMM2) the only way to have LP-DDR4 or LP-DDR5 was to solder it to the mobo, as per JEDEC Spec. If the Laptop had SO-DIMM, it used DRR4 or DDR5, which consumes more power AND generates more heat, not ideal for Laptops, Tablets or Phones.

So Apple integrating the memory in the same organic substrateas the processor was not forward thinking, but rather, something dictated by JEDEC, product requirements and economies of scale