You must be thinking of some other processor. The first released Alpha silicon, Alpha 21064, had a pipelined FPU for adds/subtracts/multiplies and a non-pipelined floating-point divide unit.

And yet another plug for Linode. I have been with them for over four years. Their infrastructure staff knows what they're doing (tech support has responded in 3 minutes on a Sunday night!) and they're hands-off with respect to how you want to run your box. Disk space is a little expensive, but it's not oversubscribed. Even the smallest accounts are well worth the money.

Companies already do for collecting sales tax in states where the companies have a physical presence.

Alright wise guy. Explain twitter.

Minor nit: fetch prediction logic in modern processors has to deal with unconditional procedure calls. Fetch pipelines aren't shallow anymore, so you need to predict the target address and speculatively fetch that cache line. Often this is before you even know you've just fetched a branch/call/jmpl.

The jump tables/switch statements in Ruby/Python/PHP make target prediction a necessity. The target of this jmpl is rarely the same twice in a row.

Or they have something to sell you. Marketers: Shooo! Go away! Leave me alone.

Let me guess, you inadvertently also found the candidates who eat candy constantly while at their desks.

There is no beauty in perl. Period.

Your example is spot-on, though. It can be completely obfuscated ASCII art or an unreadable single line.

Someone tell that to Verizon. They seem to think it's best practice to send the same marketing email to both the original address with the + and the same address without. Better yet, their unsubscribe facility refuses to accept the +.

I wish more people understood the +. I've used it to make incoming mail self-sorting for well over a decade.

File a bug report on it. .tsv files renamed to .csv work as you might expect.