I am not sure what exactly is going on with MONARCH, but the idea of polymorphism is not necessarily restricted to reconfigurable computing (like on FPGAs). I think that TRIPS (UT Austin) was the first proposed polymorphic architecture. I am not sure if they have actually built a prototype. The idea is that you build a chip with a bunch (100s or 1000s) of small cores/tiles. Then the tiles can be grouped into larger "virtual cores" depending on the type of parallelism in your workload. A good description is here in "Exploiting ILP, TLP, and DLP Using Polymorphism in the TRIPS Architecture." There is a link here: http://www.cs.utexas.edu/~trips/publications.html
There are a few other examples, also just research architectures (RAW at MIT, WaveScalar at UW). Someone with some architecture expertise might be able to correct some of my claims or explain whether MONARCH does something similar.