A virus with access to a dialup modem can make lots of expensive calls.
That's how they made their money back in the 90's.

Not at all.
I'm pretty sure they were not testing them at the maximum operating temperature, or at the worst-case workload (according each drives specific implementation of wear levelling).

Yet going back to the original "tell me the native cell life", it's completely irrelevant to everything you've said.

NAND exhaustion is going to depend on manufacturing tolerance and operating conditions. They figures manufacturers supply are conservative estimates. I'm not at all surprised a handful of drives considerably out perform their specs.

And the native cell endurance has very little to do with it.
Erase block size is more important. As well as over-provisioning.

They don't go in to details, but if they can re-purpose a MLC cell as SLC after it has worn out too much to function as MLC, that's going to increase the drive endurance/decrease amount of required over provisioning.

All of those questions are about the controller and it's wear levelling software, not the flash chips.
In regards to your questions about security, the specific number of times a cell can be erased is irrelevant, only that wear level takes place and physical data is moved around to different locations and not immediately (or potentially, ever) erased from the old location.

In theory, you should just need to delete the encryption key, because the controller encrypts all the data on the flash chips 256bit AES encryption. Again, that's entirely in the controller software.

Dumbass

I don't understand how the native cell life is relevant.
You're not buying flash chips from them, you're buying an SSD. The write endurance of the drive is what matters. How that is achieved is irrelevant.

Wow, that's an impressive 1mm camera.

1mm is about 15% of the total thickness.

Hang on a minute, it uses about the same amount of power as a Raspberry Pi.
It's a crap load more powerful.

It's to be expected though, it's a power optimised 22nm CPU.

Maybe most Americans aren't qualified and are just a little too stupid to work in their facilities?

How's that for PR?

That's why you run the OS (like linux) on the Atom CPU and do your real time interfacing on the Quark CPU that's designed to run an RTOS.

Just like how the BeagleBone Black has an ARM CPU and a little PRU

by the way, if you need to do precise timing, you should probably be using a hardware timer. That way you can sleep the device or change the clock to save power instead of burning up power at full speed in a NOP.

It's not a 32-bit processor, it's 64-bit.

Well.. technically there is a 32-bit processor, but that's in addition to the dual core 64-bit processor.

Probably because it's a 500MHz, dual core 64bit CPU with another 100MHz 32bit CPU along side it with 1GB of RAM, not an 8bit MCU?