Comment Re:and... (Score 3, Informative) 464
Sure, but for businesses, that relies on a very precarious licensing situation, and is basically unsupportable.
Sure, but for businesses, that relies on a very precarious licensing situation, and is basically unsupportable.
Basically you're not thinking small enough.
The minimum cost on ARM-based processors is somewhere around the $2 mark. I can get PICs for down to about $0.30. There's plenty of products where that sort of difference is significant - and easily high enough volume to drown any development time cost difference.
You mean some way, like, say, swapping SIM cards as is commonplace in europe, or on any of the GSM networks in the states, for that matter?
It's a policy thing. A lot of routers are configured not to accept announcements for smaller than a
Within any one memory device the timings would still be constant, though - a single CPU can access all the data within any one device in constant time across that device.
That constant will be faster for local memory than for another CPU's RAM, but within any one RAM device it's still constant.
Actually, no, it's exactly the functionally descriptive term I'm challenging.
The normal definition is a memory with flat access times - i.e. it doesn't matter what part of the memory you access, you can do it equally quickly. This doesn't apply for things like tapes or HDDs, which are respectively either sequential or semi-sequential (sequential per cylinder) access.
In the case of flash the time to perform a write is strongly dependent on the preexisting erase state of the block - if it's cleared already, it's much faster than if you need to clear it. That means that the time to access a given block of memory isn't constant (or even nearly so) so it's not really random-access.
(If you want to be really nit-picky, it's random access on reads but not on writes. It can even end up being more complicated since you can have a read queued behind a erase on some flash devices)
Actually, no it's not. Flash can't be written to randomly; it needs a block erase cycle first (and generally a block is fairly large; we're not talking one or two bytes here). Technically you can zero bits without an erase, but not set them to 1 (erasing sets everything to 1).
This is why there's a distinction between EEPROM, FLASH, and RAM.
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