Comment Re:cache coherency? (Score 1) 348
I'd consider performance implications of coherency mechanisms to fall under that phrase. An example other than performance could be simple awareness of variables in registers or on the stack being modified, then written to a memory address. Cache coherency doesn't kick in until you hit that memory address (assuming your thread has core affinity keeping the stack out of other core caches), so your synchronization will be orchestrated around these specific actions, and of course the timing and conditions this takes place can affect performance, to a point where additional cores are a hindrance.