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Average Ratings 0 Ratings

Total
ease
features
design
support

No User Reviews. Be the first to provide a review:

Write a Review

Description

Questa Verification stands out as the pioneering platform that integrates a UVM-aware debug solution, equipping engineers with critical insights into the functionality of their dynamic class-based testbenches, all within the familiar environments of source code and waveform analysis. This verification suite encompasses a comprehensive collection of technologies, methodologies, and libraries tailored for contemporary ASIC and FPGA designs. As the complexity of System-on-Chip (SoC) designs escalates, Questa continuously adapts and enhances its offerings. The platform provides valuable insights and updates on key concepts, values, standards, and methodologies, along with practical examples that help users grasp the capabilities of advanced functional verification technologies and their optimal application. Additionally, the Verification Horizons publication serves as a vital resource, presenting crucial concepts, values, methodologies, and illustrative examples to deepen understanding and facilitate effective use of these cutting-edge verification tools. Through this ongoing commitment to innovation and education, engineers are better equipped to navigate the challenges of modern design verification.

Description

Our advanced web platform significantly enhances the productivity of chip developers and verification engineers, allowing them to design and troubleshoot at a pace ten times quicker than before. With Verilator, users can effortlessly initiate and execute thousands of tests simultaneously with just one click. It also facilitates the easy sharing of test outcomes and waveforms within the organization, allows for tagging colleagues on specific signals, and provides robust tracking of test and regression failures. By utilizing Verilator to create Dockerized simulation binaries, we efficiently distribute test executions across our computing cluster, after which we gather the results and log files and have the option to rerun any tests that failed to produce waveforms. The incorporation of Docker ensures that the test executions are both consistent and reproducible. SiLogy ultimately boosts the efficiency of chip developers by shortening the time required for design and debugging processes. Prior to the advent of SiLogy, the leading method for diagnosing a failing test entailed manually copying lines from log files, analyzing waveforms on personal machines, or rerunning simulations that could take an inordinate amount of time, often spanning several days. Now, with our platform, engineers can focus more on innovation rather than being bogged down by cumbersome debugging processes.

API Access

Has API

API Access

Has API

Screenshots View All

Screenshots View All

Integrations

Docker
GitHub
Siemens Precision

Integrations

Docker
GitHub
Siemens Precision

Pricing Details

No price information available.
Free Trial
Free Version

Pricing Details

No price information available.
Free Trial
Free Version

Deployment

Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook

Deployment

Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook

Customer Support

Business Hours
Live Rep (24/7)
Online Support

Customer Support

Business Hours
Live Rep (24/7)
Online Support

Types of Training

Training Docs
Webinars
Live Training (Online)
In Person

Types of Training

Training Docs
Webinars
Live Training (Online)
In Person

Vendor Details

Company Name

Siemens

Founded

1947

Country

United States

Website

eda.sw.siemens.com/en-US/ic/questa/simulation/

Vendor Details

Company Name

SiLogy

Founded

2023

Country

United States

Website

silogy.io

Product Features

Simulation

1D Simulation
3D Modeling
3D Simulation
Agent-Based Modeling
Continuous Modeling
Design Analysis
Direct Manipulation
Discrete Event Modeling
Dynamic Modeling
Graphical Modeling
Industry Specific Database
Monte Carlo Simulation
Motion Modeling
Presentation Tools
Stochastic Modeling
Turbulence Modeling

Product Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

Alternatives

Alternatives

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Tessent

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