Average Ratings 0 Ratings
Average Ratings 0 Ratings
Description
Ansys PathFinder-SC serves as a robust and scalable solution designed to facilitate the planning, verification, and approval of IP and full-chip SoC designs, ensuring their integrity and resilience against electrostatic discharge (ESD). This innovative tool effectively identifies and isolates the underlying sources of design problems that could lead to chip failures due to charged-device model (CDM), human body model (HBM), or various ESD incidents. With its cloud-native architecture capable of harnessing thousands of compute cores, PathFinder-SC significantly accelerates full-chip turnaround times. Endorsed by leading foundries for current density assessments and ESD approval, it stands out as a reliable choice in the industry. The platform's comprehensive data modeling, extraction, and transient simulation engine provides an all-encompassing solution for ESD verification. Utilizing a single-pass model, it seamlessly reads industry-standard design formats, establishes ESD rules, extracts RCs for the power network, and conducts ESD simulations to pinpoint root causes while offering repair and optimization suggestions, all consolidated within one powerful tool. This streamlined process not only enhances efficiency but also reduces the time-to-market for critical design projects.
Description
Ansys VeloceRF accelerates the design process by significantly cutting down the time required to synthesize and model intricate spiral devices and transmission lines. Compiling the geometry of inductors or transformers takes just a matter of seconds, while modeling and analyzing them can be completed in just a few minutes. This software seamlessly integrates with top EDA platforms, creating layouts that are ready for tape-out. With Ansys VeloceRF, users can synthesize devices that tightly pack multiple components and lines, resulting in a more efficient silicon floorplan. Furthermore, analyzing the coupling effects among various inductive devices prior to detailed layout can decrease the overall design size and potentially eliminate the need for guard rings. The dimensions of inductors, along with crosstalk between them, can significantly influence the size of the die. Ansys VeloceRF assists in designing smaller devices by applying optimization criteria and geometry constraints, leading to enhanced performance. Additionally, it assesses the coupling between any number of inductors, optimizing both silicon area and inductor performance within the circuit context, ultimately contributing to a more efficient design process. By streamlining these aspects, Ansys VeloceRF empowers engineers to achieve their design goals more effectively.
API Access
Has API
API Access
Has API
Integrations
No details available.
Integrations
No details available.
Pricing Details
No price information available.
Free Trial
Free Version
Pricing Details
No price information available.
Free Trial
Free Version
Deployment
Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook
Deployment
Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook
Customer Support
Business Hours
Live Rep (24/7)
Online Support
Customer Support
Business Hours
Live Rep (24/7)
Online Support
Types of Training
Training Docs
Webinars
Live Training (Online)
In Person
Types of Training
Training Docs
Webinars
Live Training (Online)
In Person
Vendor Details
Company Name
Ansys
Founded
1970
Country
United States
Website
www.ansys.com/products/semiconductors/ansys-pathfinder-sc
Vendor Details
Company Name
Ansys
Founded
1970
Country
United States
Website
www.ansys.com/products/semiconductors/ansys-velocerf
Product Features
PCB Design
3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor
Simulation
1D Simulation
3D Modeling
3D Simulation
Agent-Based Modeling
Continuous Modeling
Design Analysis
Direct Manipulation
Discrete Event Modeling
Dynamic Modeling
Graphical Modeling
Industry Specific Database
Monte Carlo Simulation
Motion Modeling
Presentation Tools
Stochastic Modeling
Turbulence Modeling
Product Features
PCB Design
3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor