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Comment Re:Why not use the extra transistors... (Score 4, Interesting) 198

Larger caches are slower. Moving to a larger L1 cache would either require that the chip run at a lower clock rate, or increase the latency (increasing the length of time it takes to retrieve the data).

As for registers, they did increase them, from 8 to 16 with x64. IIRC, AMD stated that moving to 16 registers gave 80% of the performance increase they would have gained by moving to 32 registers.

Comment Re:Lets see here... (Score 4, Informative) 407

"In 2003, Californians sent $50 billion more to Washington in federal taxes than the state received in federal expenditures. Representing a slight increase from levels that have held steady for three preceding years, the Golden State’s imbalance set a new record for any state, surpassing the previous mark (set also by California, in 2000 and 2001) of $48 billion."

http://www.calinst.org/pubs/balance2003.htm

Maybe if that weren't the case, California wouldn't be so broke right now.

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