In 32-bit mode, PowerPC and SPARC registers are 32-bit (on 64-bit systems they're just sign-extended when running 32-bit code).

I can't believe how much total nonsense is being propagated on this thread. To quote the IBM *PowerPC Instruction Set Architecture* manual:

Implementations of this architecture provide 32 floating-point registers (FPRs). [...] Each FPR contains 64 bits that support the floating-point double format.

So, you have it completely backwards: there are no 32-bit single-precision registers on PowerPC, whether in 32-bit or 64-bit mode. It *only* has 64-bit double-precision registers. Single-precision floating-point operations (not including AltiVec) are done with the double-precision hardware, and are rounded to single-precision when they are spilled. So, storing a 64-bit floating-point value does not "halve" the number of available registers: it uses *exactly the same* (double precision) registers as for single-precision math.

The situation is very similar on x86: single and double precision use exactly the same hardware registers (which are actually 80-bit extended-precision registers on 32-bit x86 machines); going from 32-bit to 64-bit fp types does not halve the number of physical registers available. (And thanks to hardware register renaming, the instruction set's nominal limitation on the number of registers is not really a practical limitation; the hardware lets you exploit the much larger set of real physical registers.)

Judging by this thread, the "64-bit CPUs can process data twice as quickly as 32-bit CPUs" hooey has been circulating for so long that people have begun to invent works of fiction to justifiy it in their minds.