The basic architecture should be cheap to fabricate in bulk. It's lines of wires, a layer running in one direction, a thin film of the memristive material, then a layer of wires on top running at right angles. Every intersection point is a bit.
DRAMs involve all sorts of careful operations to create a trench or stack, fill it with a capacitor, run the lines in and out, etc. Much more complicated on a per-bit basis. Many more things can go wrong. Memristors are pretty much the simplest to implement circuit element I've seen come along in a long long time.
The key questions are performance. How many write cycles can the fabbed chips survive before bits start going bad / getting stuck? Typical MLC fash is 10-100 thousand, very good SLC flash 100k to 1m cycles. This is not enough that you can ignore the write lifetime issues, and today's SSDs will wear out if written very actively over long periods of time.
Memristors (and Phase-Change RAM, and some of the other options out there for new non-volatile RAM) offer potentially very long life. But it's not clear if the produced chips will be 1m and up, 10m, 100m, or what.
At some point the device's overall lifetime is shorter than the wearout rate and you stop caring about wear leveling, etc. You just detect bit errors and map around them, and a few bit errors happen over device lifecycles. The wear leveling now used is a big deal on SSDs and a major factor in their performance (or not).
Also very important is how fast the chips are. Should be fast - you fire a short AC pulse down one word line, read the bits out the bit lines. Either the resistor resists or it doesn't. Word line enable transistor delays and read amp sensing delays of less than 10x transistor cycle time at a given fab size/process are likely, which is pretty good. Potentially this is faster than DRAM, more like SRAM, but not all fab / design approaches would get there (and not all potential fab processes).
Secondarily, how fast is a write cycle. SRAM writes very very quickly. DRAM reasonably quickly. Memristor? Should be fast, but there are current and material breakdown concerns.
Fundamentally, we need to see the chips. When we see chip spec sheets, it tells us how useful these are.
It could range from "replaces FLASH at certain densities or write life requirements" to "replaces all FLASH completely" to "replaces a lot of DRAM" to "becomes the only memory in use between CPU caches and hard disks". Potentially, it could be cheap enough to even replace hard disks.
We've had computers in recent memory (1980s, early 1990s) which were operating without all the data cache tiers we now have to deal with in computer architecture. Large chunks of computer architecture now is nearly all about efficiently managing the tiered data storage - CPU registers to CPU cache, CPU cache to main memory, main memory to disk. There are factors of 10 speed difference or more between each tier (more from DRAM to disk). Fast reliable nonvolatile RAM could flatten that all out a lot. FLASH isn't good enough due to write lifecycle limits. Memristors, if the performance comes in near the top of the possible range, could. Will they? I'm not working for HP or Hyundai, I don't know what they've got. I'm preparing for designing some systems which could flatten things, who knows if we'll actually get there with this tech. It could be a game changer, or it could be just another technology on the block.