Yeah I was going to post something similar. You don't get to just build an MPEG 4 decoder in an FPGA and "voila, instant hardware decoder". The biggest FPGAs only have a few million or so gates, it wouldn't fit and would have to be still mostly driven by software. You'd put the most CPU intensive pieces into the FPGA and do the rest through the step / instruction cycles of a processor.
I'd actually argue that NVidia type coprocessors are much more appropriate for the types of tasks you mention. They have multiple concurrent pipelines, access to hardware multipliers and are readily configurable by shader language, OpenCL, CUDA, etc.
You could of course build something similar inside an FPGA, but on an NV we're talking billions of gates. The FPGA would be much smaller, maybe you'd fit one programmable pipeline.
FPGAs are great for prototyping but nothing compares to what you can lay down manually on silicon.