mrdirkdiggler writes: ArsTechnica's Hannibal takes a look at how the power concerns that currently plague datacenters are shaping next-generation computing technologies at the levels of the microchip, the board-level interconnect, and the datacenter. In a nutshell, engineers are now willing to take on a lot more hardware overhead in their designs (thermal sensors, transistors that put components into sleep states, buffers and filters at the ends of links, etc.) in order to get maximum power efficiency. The article, which has lots of nice graphics to illustrate the main points, mostly focuses on the specific technologies that Intel has in the pipeline to address these issues.
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