Core Duo - Intel's Best CPU? 305
Bender writes "How good is Intel's Core Duo mobile processor? Good enough that Apple chose to put it in the iMac, and good enough that Intel chose to base its next generation microprocessor architecture on it. But is it already Intel's best CPU? The Tech Report has managed to snag a micro-ATX motherboard for this processor and compared the Core Duo directly to a range of mobile and desktop CPUs from AMD and Intel, including the Athlon 64 X2 and the Pentium Extreme Edition. The results are surprising. Not only is the Core Duo's performance per watt better than the rest, but they conclude that its 'outright performance is easily superior to Intel's supposed flagship desktop processor, the Pentium Extreme Edition 965.'"
Having used a Intel Dual Core for awhile ... (Score:4, Informative)
Depends (Score:5, Informative)
Even more reviews (Score:5, Informative)
Benchmarks (Score:3, Informative)
Re:What? (Score:5, Informative)
Re:Having used a Intel Dual Core for awhile ... (Score:2, Informative)
Heat is a huge consideration to many people, often the deciding factor.
Assuming that the machine has been engineered sufficiently well to prevent the processor from melting down
It doesn't matter how well the machine is engineered. If you have hot componentry you'll have a hard time getting rid of the heat without making a lot of noise, especially under load.
But I never even considered not buying one because of the heat
What choice did you have? With laptops (especially Apple) you basically take what you can get. There's very little mention of heat or cooling considerations at all.
And no consideration at all to desktop buyers
I bought an Athlon X2 solely because it runs much cooler than the P4.
and in server rooms where it is a consideration... they'll have an A/C system anyway
The consideration is power consumption. More heat means more power draw means more expensive.
I doubt Intel is going to lose any customers because their chip gets too hot.
They lost me in the last round. Thankfully they're finally about to put the P4 to rest and we can get back to the good old P3. I mean, P-M. I mean, 'Core'. Whatever.
By the way, once you start caring about heat (and you will!) go here for starters: http://www.silentpcreview.com/ [silentpcreview.com]
Re:Load of Crap (Score:4, Informative)
Re:What? (Score:5, Informative)
Re:What? (Score:1, Informative)
Of course, all these speed improvements only happen on the AMD's 64bit architecture---as the Intel's versions only provide the instructions, but still run just as slow as the 32bit version would.
Re:Having used a Intel Dual Core for awhile ... (Score:2, Informative)
Pentium-M 2.26GHz 90nm 27W
Core Duo 2.16GHz 65mn 31W
Of course, there's low-watt versions of all of these.
Re:What? (Score:5, Informative)
Re:Load of Crap (Score:4, Informative)
It sure the hell is. I have a 2.0x2 G5 desktop machine and one of the new 1.66 GHz Core Duo Mac Minis. Running Handbrake [m0k.org], the mini is easily twice as fast.
Re:Having used a Intel Dual Core for awhile ... (Score:4, Informative)
Also, heat can actually reduce the life-span of components.
Re:What? (Score:4, Informative)
For example: AMD's claims about UT2004 being 20% faster in 64-bit mode turned out to be bogus (more like 2%).
Re:CoreDuo != Core Microarchitecture (Score:5, Informative)
That's not to say there isn't a small army of design engineers at Intel and AMD who work with nothing but schematics - there are. Its just that most of the logic design work is done on the HDL coding level (with either VHDL, IHDL, Verilog, or some other tool). You only start dealing with schematics at a much later stage of development. Until then your designs are constantly changing and its infinitely easy/faster to change a few lines of HDL code than to re-write hundreds/thousands of wires and transistors.
I've worked at both Intel and AMD in the past and in both cases you could take the entire codebase for a processor (HDL, microcode, ROM, etc), compile it with the right HDL compiler and run the entire thing with small test programs as a simulator. Thats how much of the validation/verification work is done before they make the masks.
As for using the old code bases... That's done a lot. There's just too much complexity and too little time for them to re-write every processor from scratch. You also have countless hours invested in making sure previous designs work. If you're only doing small changes it would be hard to justfy building something from scratch since you'll have to do all of that validation work again.
As a slashdotter this probably doesn't concern you (Score:2, Informative)
Re:Maybe per watt performance is the best but... (Score:4, Informative)
'Yet' is now.
Merom/Conroe defeats AMD-AM2 hands down, and AMD has nothin' on the roadmap for the next two years, because AM2 slipped a full 12 months.
Go surf around Anandtech.com
AMD is in deep doo doo.
Re:What? (Score:2, Informative)
Register renaming has nothing to do with context switches. The "invisible" registers are used to remove false dependencies in the instruction stream to increase Instruction-Level Parallelsim (ILP) within a single thread. In fact, on a context switch, the architectural state exactly matches the physical state (no "invisible" registers are in use), and so the processor doesn't have to save any extra registers other than the architecturally-visible ones. The details (skip if you're not interested):
loop:
movl %ecx, (%ebx)
# Do something complicated with ECX
addl $4, %ebx
cmpl $64, %ebx
jl loop
In the above assembly, the instructions are dependent upon one another: you can't execute the incl until after the movl because the incl overwrites EBX. You can't start executing the next iteration of the loop until the current iteration is finished, because the movl at the top of the loop overwrites ECX. These restrictions only arise because you are reusing the registers EBX and ECX. If you could somehow use different "copies" of these registers, you could execute multiple iterations of the loop in parallel, and execute instructions inside the loop out of order.
Inside the processor, the instruction stream may be seen like this:
%r0 <- (%r1)
...
# Do something complicated with r0
%r2 <- %r1 + 4
cmpl $100, %r2
jl loop
%r3 <- (%r2)
# Do something complicated with r3
%r4 <- %r2 + 4
cmpl $100, %r4
jl loop
The processor has removed all false dependencies by using its internal, non-visible registers to remap different loop's "instances" of EBX and ECX to different physical registers. This enable out-of-order execution: since the next "copy" of EBX has been renamed to be a different physical register (r2) than the original value of EBX (r1), the processor can execute the addl instruction LONG before it executes the "Do something complicated" portion of the loop.
This then allows the processor to execute multiple iterations of the loop in parallel (with branch speculation and recovery) by performing the addl instruction very soon after the loop begins, which will allow further iterations of the loop to run by calculating the "next" value of EBX. The processor has effectively performed loop unrolling in hardware.
Re:Having used a Intel Dual Core for awhile ... (Score:3, Informative)
Wha?? Did you even glance at the article?
The Core Solo uses the same power as the Pentium-M to deliver more performance. The Core Duo uses slightly more power than the Pentium-M to deliver a lot more performance. Ergo, the performance per watt figures in both cases are better than the Pentium-M's.
In what sense, exactly, does the Core (Yonah) series not continue making improvements on its predecessors?
Re:Keep in mind that (Score:3, Informative)
If Intel could get to 45nm before AMD even gets to 65nm, you could kiss any performance gain that 65nm would lend AMD totally goodbye. (There's no telling how likely it is that this could happen, but seeing as both Intel and AMD are putting a great deal of their resources into it, it's anyones guess).