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ease
features
design
support

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Description

Ansys PowerArtist stands out as the preferred RTL design-for-power solution for top low-power semiconductor firms, offering essential tools for early power analysis and mitigation. The platform features advanced physically-aware RTL power accuracy, interactive debugging for power issues, and methods for analysis-driven power reduction, along with unique metrics that help in monitoring power efficiency and vector coverage. It allows for quick power profiling of real workloads and ensures seamless integration of RTL-to-physical power grid integrity. With its innovative physically-aware modeling, PowerArtist provides reliable RTL power accuracy with rapid turnaround times, empowering semiconductor companies to make informed early-stage decisions. Waiting until after synthesis to analyze power consumption is no longer acceptable; design teams depend on PowerArtist to dissect power usage, pinpoint inefficient RTL code, and minimize unnecessary toggles throughout the design process. This capability enables them to efficiently profile millions of cycles, ultimately leading to more optimized and effective designs.

Description

Oasys-RTL meets the demand for enhanced capacity, quicker runtimes, elevated quality of results (QoR), and physical awareness by performing optimization at a more abstract level while also incorporating integrated floorplanning and placement features. This tool significantly improves the quality of results by facilitating physical accuracy, efficient floorplanning, and rapid optimization cycles, ensuring timely design closure. Its power-aware synthesis capabilities encompass support for multi-threshold libraries, automatic clock gating, and a UPF-based multi-voltage domain flow. During the synthesis process, Oasys-RTL intelligently inserts the necessary level shifters, isolation cells, and retention registers according to the power intent specified in the UPF framework. Additionally, Oasys-RTL can generate a floorplan directly from the design's RTL by applying dataflow and adhering to timing, power, area, and congestion constraints. It adeptly incorporates regions, fences, blockages, and other physical directives via advanced floorplan editing tools while automatically positioning macros, pins, and pads to optimize the layout. This holistic approach ensures that designers can efficiently manage complex designs and meet stringent performance requirements.

API Access

Has API

API Access

Has API

Screenshots View All

Screenshots View All

Integrations

No details available.

Integrations

No details available.

Pricing Details

No price information available.
Free Trial
Free Version

Pricing Details

No price information available.
Free Trial
Free Version

Deployment

Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook

Deployment

Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook

Customer Support

Business Hours
Live Rep (24/7)
Online Support

Customer Support

Business Hours
Live Rep (24/7)
Online Support

Types of Training

Training Docs
Webinars
Live Training (Online)
In Person

Types of Training

Training Docs
Webinars
Live Training (Online)
In Person

Vendor Details

Company Name

Ansys

Founded

1970

Country

United States

Website

www.ansys.com/products/semiconductors/ansys-powerartist

Vendor Details

Company Name

Siemens

Founded

1847

Country

United States

Website

eda.sw.siemens.com/en-US/ic/oasys-rtl/

Product Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

Product Features

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Alternatives

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